[PATCH v1] arm64: head.S: Do not trap access to MPAMSM_EL1

[PATCH v1] arm64: head.S: Do not trap access to MPAMSM_EL1

[Fuad Tabba]

Bit 50 of MPAM2_EL2, EnMPAMSM, traps access to MPAMSM_EL1 when 0,
as per ARM ARM DDI DDI0487L.a, section D24.12.3. Therefore,
ensure it is set to 1 for the host to disable the traps.

Fixes: 31ff96c38ea3 ("KVM: arm64: Fix missing traps of guest accesses to the MPAM registers")
Fixes: 23b33d1e168c ("arm64: head.S: Initialise MPAM EL2 registers and disable traps")
Signed-off-by: Fuad Tabba <tabba@google.com>
---
 arch/arm64/include/asm/el2_setup.h      | 4 +++-
 arch/arm64/include/asm/kvm_arm.h        | 3 +++
 arch/arm64/kvm/hyp/include/hyp/switch.h | 2 +-
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 25e162651750..fb4da155d994 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -254,8 +254,10 @@
 	mrs	x1, id_aa64pfr0_el1
 	ubfx	x0, x1, #ID_AA64PFR0_EL1_MPAM_SHIFT, #4
 	cbz	x0, .Lskip_mpam_\@		// skip if no MPAM
-	msr_s	SYS_MPAM2_EL2, xzr		// use the default partition
+	mov_q	x0, MPAM2_HOST_FLAGS
+	msr_s	SYS_MPAM2_EL2, x0		// use the default partition
 						// and disable lower traps
+						// don't trap access to MPAMSM_EL1
 	mrs_s	x0, SYS_MPAMIDR_EL1
 	tbz	x0, #MPAMIDR_EL1_HAS_HCR_SHIFT, .Lskip_mpam_\@	// skip if no MPAMHCR reg
 	msr_s	SYS_MPAMHCR_EL2, xzr		// clear TRAP_MPAMIDR_EL1 -> EL2
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 8d94a6c0ed5c..78d46d52b3da 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -147,6 +147,9 @@
 
 #define VTCR_EL2_T0SZ(x)	TCR_T0SZ(x)
 
+/* MPAM2_EL2 for the host to ensure not to trap access to MPAMSM_EL1. */
+#define MPAM2_HOST_FLAGS	MPAM2_EL2_EnMPAMSM
+
 /*
  * We configure the Stage-2 page tables to always restrict the IPA space to be
  * 40 bits wide (T0SZ = 24).  Systems with a PARange smaller than 40 bits are
diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index f838a45665f2..44b4995258e8 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -227,7 +227,7 @@ static inline void __deactivate_traps_mpam(void)
 	if (!system_supports_mpam())
 		return;
 
-	write_sysreg_s(0, SYS_MPAM2_EL2);
+	write_sysreg_s(MPAM2_HOST_FLAGS, SYS_MPAM2_EL2);
 
 	if (system_supports_mpam_hcr())
 		write_sysreg_s(MPAMHCR_HOST_FLAGS, SYS_MPAMHCR_EL2);

base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
-- 
2.48.1.362.g079036d154-goog

Re: [PATCH v1] arm64: head.S: Do not trap access to MPAMSM_EL1

[Marc Zyngier]

On Wed, 05 Feb 2025 16:46:27 +0000,
Fuad Tabba <tabba@google.com> wrote:
> 
> Bit 50 of MPAM2_EL2, EnMPAMSM, traps access to MPAMSM_EL1 when 0,
> as per ARM ARM DDI DDI0487L.a, section D24.12.3. Therefore,
> ensure it is set to 1 for the host to disable the traps.

But what makes use of this register in the kernel? I can't find any
trace of it in 6.14-rc1.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH v1] arm64: head.S: Do not trap access to MPAMSM_EL1

[Fuad Tabba]

Hi Marc,

On Wed, 5 Feb 2025 at 17:02, Marc Zyngier <maz@kernel.org> wrote:
>
> On Wed, 05 Feb 2025 16:46:27 +0000,
> Fuad Tabba <tabba@google.com> wrote:
> >
> > Bit 50 of MPAM2_EL2, EnMPAMSM, traps access to MPAMSM_EL1 when 0,
> > as per ARM ARM DDI DDI0487L.a, section D24.12.3. Therefore,
> > ensure it is set to 1 for the host to disable the traps.
>
> But what makes use of this register in the kernel? I can't find any
> trace of it in 6.14-rc1.

I understand that MPAM support in the kernel isn't there quite yet.
Also, regarding enabling access to a register at EL1, without the
whole framework for enabling MPAM, might be problematic. It makes more
sense for this to be part of the work to add MPAM support, which I
believe James might be working on.

Cheers,
/fuad

> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.