From: Marc Zyngier <maz@kernel.org>
To: Fuad Tabba <tabba@google.com>
Cc: kvmarm@lists.linux.dev, oliver.upton@linux.dev,
broonie@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org,
eric.auger@redhat.com, jingzhangos@google.com,
joey.gouly@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 14/17] KVM: arm64: Macros for setting/clearing FGT bits
Date: Mon, 18 Dec 2023 11:12:43 +0000 [thread overview]
Message-ID: <86v88vahn8.wl-maz@kernel.org> (raw)
In-Reply-To: <CA+EHjTxZmc2bAaDbFLjWxx-LzCX7Jwy+EH60JgFBvWYh68U=xg@mail.gmail.com>
On Mon, 18 Dec 2023 09:56:32 +0000,
Fuad Tabba <tabba@google.com> wrote:
>
> Hi Marc,
>
> On Mon, Dec 18, 2023 at 9:40 AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Thu, 14 Dec 2023 10:01:54 +0000,
> > Fuad Tabba <tabba@google.com> wrote:
> > >
> > > There's a lot of boilerplate code for setting and clearing FGT
> > > bits when activating guest traps. Refactor it into macros. These
> > > macros will also be used in future patch series.
> > >
> > > No functional change intended.
> > >
> > > Signed-off-by: Fuad Tabba <tabba@google.com>
> > > ---
> > > arch/arm64/kvm/hyp/include/hyp/switch.h | 60 +++++++++----------------
> > > 1 file changed, 21 insertions(+), 39 deletions(-)
> > >
> > > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
> > > index 17ce40f5b006..e223fc0d5193 100644
> > > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h
> > > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
> > > @@ -79,6 +79,23 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)
> > > clr |= ~hfg & __ ## reg ## _nMASK; \
> > > } while(0)
> > >
> > > +#define update_fgt_traps_cs(reg, clr, set) \
> > > + do { \
> > > + struct kvm_cpu_context *hctxt = \
> > > + &this_cpu_ptr(&kvm_host_data)->host_ctxt; \
> > > + u64 val, c = 0, s = 0; \
> > > + \
> > > + ctxt_sys_reg(hctxt, reg) = read_sysreg_s(SYS_ ## reg); \
> > > + compute_clr_set(vcpu, reg, c, s); \
> >
> > You are referring to a variable name that is in the scope of the macro
> > user, and not the macro itself. It is so fragile it isn't funny.
> >
> > Why don't you simply pass the vcpu as a parameter to the function?
> >
> > Another thing is that this read/write can be expensive. How about not
> > doing anything when there is no change to the value of the sysreg?
>
> What do you think of this (spacing will be fixed):
>
> #define update_fgt_traps_cs(vcpu, reg, clr, set) \
> do {
> \
> struct kvm_cpu_context *hctxt =
> \
> &this_cpu_ptr(&kvm_host_data)->host_ctxt; \
> u64 val, c = 0, s = 0;
> \
>
> \
> ctxt_sys_reg(hctxt, reg) = read_sysreg_s(SYS_ ## reg); \
> compute_clr_set(vcpu, reg, c, s);
> \
> val = __ ## reg ## _nMASK;
> \
> val |= (s | set);
> \
> val &= ~(c | clr);
> \
> if (ctxt_sys_reg(hctxt, reg) != val)
> \
> write_sysreg_s(val, SYS_ ## reg);
> \
> } while(0)
>
> If it looks good to you, I'll fix it on the respin.
This is what I have on top at the moment:
diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index 27077e1f7de2..d56fef44dc31 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -79,22 +79,26 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)
clr |= ~hfg & __ ## reg ## _nMASK; \
} while(0)
-#define update_fgt_traps_cs(reg, clr, set) \
+#define update_fgt_traps_cs(vcpu, reg, clr, set) \
do { \
struct kvm_cpu_context *hctxt = \
&this_cpu_ptr(&kvm_host_data)->host_ctxt; \
- u64 val, c = 0, s = 0; \
+ u64 c = 0, s = 0; \
\
ctxt_sys_reg(hctxt, reg) = read_sysreg_s(SYS_ ## reg); \
compute_clr_set(vcpu, reg, c, s); \
- val = __ ## reg ## _nMASK; \
- val |= (s | set); \
- val &= ~(c | clr); \
- write_sysreg_s(val, SYS_ ## reg); \
+ s |= set; \
+ c |= clr; \
+ if (c || s) { \
+ u64 val = __ ## reg ## _nMASK; \
+ val |= s; \
+ val &= ~c; \
+ write_sysreg_s(val, SYS_ ## reg); \
+ } \
} while(0)
-#define update_fgt_traps(reg) \
- update_fgt_traps_cs(reg, 0, 0)
+#define update_fgt_traps(vcpu, reg) \
+ update_fgt_traps_cs(vcpu, reg, 0, 0)
/*
* Validate the fine grain trap masks.
@@ -171,9 +175,9 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)
if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))
return;
- update_fgt_traps(HFGITR_EL2);
- update_fgt_traps(HDFGRTR_EL2);
- update_fgt_traps(HDFGWTR_EL2);
+ update_fgt_traps(vcpu, HFGITR_EL2);
+ update_fgt_traps(vcpu, HDFGRTR_EL2);
+ update_fgt_traps(vcpu, HDFGWTR_EL2);
if (cpu_has_amu())
update_fgt_traps(vcpu, HAFGRTR_EL2);
If that seems sensible to you, I'll fold it in, as I'd like to do
without a respin if we can avoid it.
` M.
--
Without deviation from the norm, progress is not possible.
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next prev parent reply other threads:[~2023-12-18 11:13 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-14 10:01 [PATCH v3 00/17] KVM: arm64: Fixes to fine grain traps and pKVM traps Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 01/17] arm64/sysreg: Add missing Pauth_LR field definitions to ID_AA64ISAR1_EL1 Fuad Tabba
2023-12-14 10:42 ` Mark Brown
2023-12-14 10:49 ` Mark Brown
2023-12-14 10:01 ` [PATCH v3 02/17] arm64/sysreg: Add missing ExtTrcBuff field definition to ID_AA64DFR0_EL1 Fuad Tabba
2023-12-14 10:46 ` Mark Brown
2023-12-14 10:01 ` [PATCH v3 03/17] arm64/sysreg: Add missing system register definitions for FGT Fuad Tabba
2023-12-14 10:50 ` Mark Brown
2023-12-14 10:01 ` [PATCH v3 04/17] arm64/sysreg: Add missing system instruction " Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 05/17] KVM: arm64: Explicitly trap unsupported HFGxTR_EL2 features Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 06/17] KVM: arm64: Add missing HFGxTR_EL2 FGT entries to nested virt Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 07/17] KVM: arm64: Add missing HFGITR_EL2 " Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 08/17] KVM: arm64: Add bit masks for HAFGRTR_EL2 Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 09/17] KVM: arm64: Handle HAFGRTR_EL2 trapping in nested virt Fuad Tabba
2023-12-15 13:43 ` Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 10/17] KVM: arm64: Update and fix FGT register masks Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 11/17] KVM: arm64: Add build validation for FGT trap mask values Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 12/17] KVM: arm64: Use generated FGT RES0 bits instead of specifying them Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 13/17] KVM: arm64: Define FGT nMASK bits relative to other fields Fuad Tabba
2023-12-18 9:07 ` Marc Zyngier
2023-12-18 9:16 ` Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 14/17] KVM: arm64: Macros for setting/clearing FGT bits Fuad Tabba
2023-12-15 13:45 ` Fuad Tabba
2023-12-18 9:40 ` Marc Zyngier
2023-12-18 9:56 ` Fuad Tabba
2023-12-18 11:12 ` Marc Zyngier [this message]
2023-12-18 11:17 ` Fuad Tabba
2023-12-18 12:25 ` Marc Zyngier
2023-12-18 12:30 ` Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 15/17] KVM: arm64: Fix which features are marked as allowed for protected VMs Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 16/17] KVM: arm64: Mark PAuth as a restricted feature " Fuad Tabba
2023-12-14 10:01 ` [PATCH v3 17/17] KVM: arm64: Trap external trace " Fuad Tabba
2023-12-17 13:41 ` [PATCH v3 00/17] KVM: arm64: Fixes to fine grain traps and pKVM traps Will Deacon
2023-12-18 17:11 ` (subset) " Marc Zyngier
2023-12-18 17:15 ` Fuad Tabba
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