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Wed, 12 Apr 2023 11:22:29 +0100 Date: Wed, 12 Apr 2023 11:22:29 +0100 Message-ID: <86v8i1l7ru.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: Reiji Watanabe , Oliver Upton , Will Deacon , Catalin Marinas , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Shaoqin Huang , Rob Herring Subject: Re: [PATCH v2 2/2] KVM: arm64: PMU: Don't overwrite PMUSERENR with vcpu loaded In-Reply-To: References: <20230408034759.2369068-1-reijiw@google.com> <20230408034759.2369068-3-reijiw@google.com> <20230412051410.emaip77vyak624pu@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, reijiw@google.com, oliver.upton@linux.dev, will@kernel.org, catalin.marinas@arm.com, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, alexandru.elisei@arm.com, yuzenghui@huawei.com, suzuki.poulose@arm.com, pbonzini@redhat.com, ricarkol@google.com, jingzhangos@google.com, rananta@google.com, shahuang@redhat.com, robh@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230412_032233_560259_89206CE4 X-CRM114-Status: GOOD ( 25.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 12 Apr 2023 10:20:05 +0100, Mark Rutland wrote: > > On Tue, Apr 11, 2023 at 10:14:10PM -0700, Reiji Watanabe wrote: > > Uh, right, interrupts are not masked during those windows... > > > > What I am currently considering on this would be disabling > > IRQs while manipulating the register, and introducing a new flag > > to indicate whether the PMUSERENR for the guest EL0 is loaded, > > and having kvm_set_pmuserenr() check the new flag. > > > > The code would be something like below (local_irq_save/local_irq_restore > > needs to be excluded for NVHE though). It shouldn't need to be excluded. It should be fairly harmless, unless I'm missing something really obvious? > > > > What do you think ? > > I'm happy with that; it doesn't change the arm_pmu side of the interface and it > looks good from a functional perspective. > > I'll have to leave it to Marc and Oliver to say whether they're happy with the > KVM side. This looks OK to me. My only ask would be to have a small comment in the __{de}activate_traps_common() functions to say what this protects against, because I'll page it out within minutes. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel