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Sat, 22 Nov 2025 12:40:27 +0000 Date: Sat, 22 Nov 2025 12:40:27 +0000 Message-ID: <86wm3iqlz8.wl-maz@kernel.org> From: Marc Zyngier To: Tian Zheng Cc: , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 1/5] arm64/sysreg: Add HDBSS related register information In-Reply-To: <20251121092342.3393318-2-zhengtian10@huawei.com> References: <20251121092342.3393318-1-zhengtian10@huawei.com> <20251121092342.3393318-2-zhengtian10@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: zhengtian10@huawei.com, oliver.upton@linux.dev, catalin.marinas@arm.com, corbet@lwn.net, pbonzini@redhat.com, will@kernel.org, linux-kernel@vger.kernel.org, yuzenghui@huawei.com, wangzhou1@hisilicon.com, yezhenyu2@huawei.com, xiexiangyou@huawei.com, zhengchuan@huawei.com, linuxarm@huawei.com, joey.gouly@arm.com, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 21 Nov 2025 09:23:38 +0000, Tian Zheng wrote: > > From: eillon > > The ARM architecture added the HDBSS feature and descriptions of > related registers (HDBSSBR/HDBSSPROD) in the DDI0601(ID121123) version, > add them to Linux. > > Signed-off-by: eillon > Signed-off-by: Tian Zheng > --- > arch/arm64/include/asm/esr.h | 2 ++ > arch/arm64/include/asm/kvm_arm.h | 1 + > arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++ > 3 files changed, 31 insertions(+) > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > index e1deed824464..a6f3cf0b9b86 100644 > --- a/arch/arm64/include/asm/esr.h > +++ b/arch/arm64/include/asm/esr.h > @@ -159,6 +159,8 @@ > #define ESR_ELx_CM (UL(1) << ESR_ELx_CM_SHIFT) > > /* ISS2 field definitions for Data Aborts */ > +#define ESR_ELx_HDBSSF_SHIFT (11) > +#define ESR_ELx_HDBSSF (UL(1) << ESR_ELx_HDBSSF_SHIFT) > #define ESR_ELx_TnD_SHIFT (10) > #define ESR_ELx_TnD (UL(1) << ESR_ELx_TnD_SHIFT) > #define ESR_ELx_TagAccess_SHIFT (9) > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > index 1da290aeedce..b71122680a03 100644 > --- a/arch/arm64/include/asm/kvm_arm.h > +++ b/arch/arm64/include/asm/kvm_arm.h > @@ -124,6 +124,7 @@ > TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK) > > /* VTCR_EL2 Registers bits */ > +#define VTCR_EL2_HDBSS (1UL << 45) I think it is time to convert VTCR_EL2 to the sysreg infrastructure instead of adding extra bits here. M. -- Without deviation from the norm, progress is not possible.