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From: Marc Zyngier <maz@kernel.org>
To: Wei-Lin Chang <r09922117@csie.ntu.edu.tw>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Christoffer Dall <christoffer.dall@arm.com>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	Chase Conklin <chase.conklin@arm.com>,
	Eric Auger <eauger@redhat.com>
Subject: Re: [PATCH v2 09/12] KVM: arm64: nv: Propagate CNTHCTL_EL2.EL1NV{P,V}CT bits
Date: Fri, 17 Jan 2025 15:19:03 +0000	[thread overview]
Message-ID: <86wmetv57c.wl-maz@kernel.org> (raw)
In-Reply-To: <qbmqsm3llnpy2t4ig3uyggkapwlbox2wnfu52gksbhcq4vfpqx@dz5bbn3asn5s>

On Mon, 06 Jan 2025 02:33:39 +0000,
Wei-Lin Chang <r09922117@csie.ntu.edu.tw> wrote:
> 
> Hi Marc and other KVM ARM developers,
> 
> I have a question while learning about NV and reading the code:
> 
> On Tue, Dec 17, 2024 at 02:23:17PM +0000, Marc Zyngier wrote:
> > Allow a guest hypervisor to trap accesses to CNT{P,V}CT_EL02 by
> > propagating these trap bits to the host trap configuration.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  arch/arm64/kvm/arch_timer.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> > index 6f04f31c0a7f2..e5951e6eaf236 100644
> > --- a/arch/arm64/kvm/arch_timer.c
> > +++ b/arch/arm64/kvm/arch_timer.c
> > @@ -824,6 +824,10 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)
> >  	 * Apply the enable bits that the guest hypervisor has requested for
> >  	 * its own guest. We can only add traps that wouldn't have been set
> >  	 * above.
> > +	 * Implementation choices: we do not support NV when E2H=0 in the
> > +	 * guest, and we don't support configuration where E2H is writable
> > +	 * by the guest (either FEAT_VHE or FEAT_E2H0 is implemented, but
> > +	 * not both). This simplifies the handling of the EL1NV* bits.
> 
> Previously I was not aware that KVM ARM has these constraints on guest's
> view of NV and E2H, so I appreciate this comment very much. However,
> after digging through the code I could not find anywhere where these
> constraints are enforced, for example initially I thought I would find
> ID_AA64MMFR2_EL1_NV being zeroed in limit_nv_id_regs(), or HCR_NV added
> to the res0 mask of HCR_EL2, base on whether FEAT_VHE or FEAT_E2H0 is
> available to the guest. But seems like in these places the code applies
> constraints looking at the host's capabilities, not the guest's.
> Do you mind providing some pointers for me to investigate the code mode?

Where have you looked?

These constraints are enforced in the kvm-arm64/nv-e2h-select
branch[1], which is pulled in the kvm-arm64/nv-next branch[2].

The NV support is split in discrete series in order to make things
easier to review, but you need to have seen them all to somehow
connect the dots.

HTH,

	M.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-e2h-select
[2] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-next

-- 
Without deviation from the norm, progress is not possible.


  reply	other threads:[~2025-01-17 15:45 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-17 14:23 [PATCH v2 00/12] KVM: arm64: Add NV timer support Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 01/12] KVM: arm64: nv: Add handling of EL2-specific timer registers Marc Zyngier
2024-12-21  1:38   ` Oliver Upton
2024-12-21  9:57     ` Marc Zyngier
2024-12-21 21:58       ` Oliver Upton
2024-12-17 14:23 ` [PATCH v2 02/12] KVM: arm64: nv: Sync nested timer state with FEAT_NV2 Marc Zyngier
2025-01-06  2:19   ` Wei-Lin Chang
2025-01-26 15:25   ` Volodymyr Babchuk
2025-01-27 17:15     ` Marc Zyngier
2025-01-28 11:29       ` Volodymyr Babchuk
2025-01-28 12:17         ` Marc Zyngier
2025-01-28 13:56           ` Volodymyr Babchuk
2024-12-17 14:23 ` [PATCH v2 03/12] KVM: arm64: nv: Publish emulated timer interrupt state in the in-memory state Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 04/12] KVM: arm64: nv: Use FEAT_ECV to trap access to EL0 timers Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 05/12] KVM: arm64: nv: Accelerate EL0 timer read accesses when FEAT_ECV in use Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 06/12] KVM: arm64: nv: Accelerate EL0 counter accesses from hypervisor context Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 07/12] KVM: arm64: Handle counter access early in non-HYP context Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 08/12] KVM: arm64: nv: Add trap routing for CNTHCTL_EL2.EL1{NVPCT,NVVCT,TVT,TVCT} Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 09/12] KVM: arm64: nv: Propagate CNTHCTL_EL2.EL1NV{P,V}CT bits Marc Zyngier
2025-01-06  2:33   ` Wei-Lin Chang
2025-01-17 15:19     ` Marc Zyngier [this message]
2025-01-21  6:04       ` Wei-Lin Chang
2024-12-17 14:23 ` [PATCH v2 10/12] KVM: arm64: nv: Sanitise CNTHCTL_EL2 Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 11/12] KVM: arm64: Work around x1e's CNTVOFF_EL2 bogosity Marc Zyngier
2024-12-17 14:23 ` [PATCH v2 12/12] KVM: arm64: nv: Document EL2 timer API Marc Zyngier
2025-01-02 19:15 ` [PATCH v2 00/12] KVM: arm64: Add NV timer support Oliver Upton
2025-01-02 19:25 ` Marc Zyngier

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