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Tue, 21 Jul 2026 10:10:07 +0000 Date: Tue, 21 Jul 2026 11:10:07 +0100 Message-ID: <86y0f4ejr4.wl-maz@kernel.org> From: Marc Zyngier To: Mostafa Saleh Cc: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oupton@kernel.org, seiden@linux.ibm.com, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, vdonnefort@google.com, tabba@google.com, sebastianene@google.com, keirf@google.com, Fuad Tabba Subject: Re: [PATCH v2] KVM: arm64: Optimize protected mode and FWB In-Reply-To: <20260721085646.1660673-1-smostafa@google.com> References: <20260721085646.1660673-1-smostafa@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: smostafa@google.com, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oupton@kernel.org, seiden@linux.ibm.com, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, vdonnefort@google.com, tabba@google.com, sebastianene@google.com, keirf@google.com, fuad.tabba@linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 21 Jul 2026 09:56:45 +0100, Mostafa Saleh wrote: > > KVM opportunistically enables FWB if supported by the system for guest > VMs, which allows it to elude cache maintenance for data as they are > forced to be cacheable from stage-2. > In that case, __clean_dcache_guest_page() will immediately return. > However in protected mode, before calling __clean_dcache_guest_page() > it loops over the range and fix_map/unmap it, issuing TLB > invalidations, dsb() and isb() unnecessarily. > > This can be optimized by returning early if FWB is supported, > kvm_pgtable_stage2_map() already issues dsb() and tlb invalidation > functions issue dsb() for the unmap path. > > Signed-off-by: Mostafa Saleh > Reviewed-by: Fuad Tabba > --- > arch/arm64/kvm/hyp/nvhe/mem_protect.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > index 4e329e39a695..049a09be2bbf 100644 > --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > @@ -261,6 +261,13 @@ static void __apply_guest_page(void *va, size_t size, > > static void clean_dcache_guest_page(void *va, size_t size) > { > + /* > + * Guest stage-2 uses FWB if available, making it safe to elide CMOs. > + * In contrast, the host stage-2 never has FWB enabled. Beeeeeeep!!! Since a373930ec9406 ("KVM: arm64: Switch pKVM host S2 over to KVM_PGTABLE_S2_AS_S1"), FWB is enabled everywhere when available. Not sure that changes anything, but the comment is factually wrong. Thanks, M. -- Without deviation from the norm, progress is not possible.