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Thu, 27 Nov 2025 16:35:02 +0000 Date: Thu, 27 Nov 2025 16:35:02 +0000 Message-ID: <86zf87ph6x.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: Yao Yuan , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joey Gouly , Suzuki K Poulose , Zenghui Yu , Ben Horgan Subject: Re: [PATCH v2 4/5] KVM: arm64: Report optional ID register traps with a 0x18 syndrome In-Reply-To: References: <20251126155951.1146317-1-maz@kernel.org> <20251126155951.1146317-5-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oupton@kernel.org, yaoyuan@linux.alibaba.com, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, ben.horgan@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251127_083505_558850_27BA4876 X-CRM114-Status: GOOD ( 31.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 27 Nov 2025 06:43:51 +0000, Oliver Upton wrote: > > On Thu, Nov 27, 2025 at 02:07:08PM +0800, Yao Yuan wrote: > > On Wed, Nov 26, 2025 at 03:59:50PM +0800, Marc Zyngier wrote: > > > With FEAT_IDST, unimplemented system registers in the feature ID space > > > must be reported using EC=0x18 at the closest handling EL, rather than > > > with an UNDEF. > > > > > > Most of these system registers are always implemented thanks to their > > > dependency on FEAT_AA64, except for a set of (currently) three registers: > > > GMID_EL1 (depending on MTE2), CCSIDR2_EL1 (depending on FEAT_CCIDX), > > > and SMIDR_EL1 (depending on SME). > > > > > > For these three registers, report their trap as EC=0x18 if they > > > end-up trapping into KVM and that FEAT_IDST is not implemented in the > > > guest. Otherwise, just make them UNDEF. > > > > > > Signed-off-by: Marc Zyngier > > > --- > > > arch/arm64/kvm/sys_regs.c | 16 +++++++++++++--- > > > 1 file changed, 13 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > > index 2ca6862e935b5..7705f703e7c6d 100644 > > > --- a/arch/arm64/kvm/sys_regs.c > > > +++ b/arch/arm64/kvm/sys_regs.c > > > @@ -82,6 +82,16 @@ static bool write_to_read_only(struct kvm_vcpu *vcpu, > > > "sys_reg write to read-only register"); > > > } > > > > > > +static bool idst_access(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > > > + const struct sys_reg_desc *r) > > > +{ > > > + if (kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, 0x0)) > > > > Hi Marc, > > > > Minor: maybe beter readability if use NI instead of 0x0, just like > > things in feat_nv2() below, but depends on you. > > +1, using the ESR value as an identifier in the sysreg tables is just > terrible. This reads like a literal. Yeah, I was a bit shocked when I found how it was encoded in the sysreg file, but kept it as is. Since there is a consensus that this is pretty lame, I'll add a patch repainting it using the usual NI/IMP identifiers. Thanks, M. -- Without deviation from the norm, progress is not possible.