Re: [PATCH v5 0/4] KVM: arm64: Errata management for VM Live migration

[Marc Zyngier <maz@kernel.org>]

On Tue, 04 Feb 2025 17:42:04 +0000,
Sebastian Ott <sebott@redhat.com> wrote:
> 
> On Tue, 4 Feb 2025, Marc Zyngier wrote:
> > On Tue, 04 Feb 2025 16:45:38 +0000,
> > Sebastian Ott <sebott@redhat.com> wrote:
> >> 
> >> Hey,
> >> 
> >> On Fri, 24 Jan 2025, Shameer Kolothum wrote:
> >>> On ARM64 platforms most of the errata workarounds are based on CPU
> >>> MIDR/REVIDR values and a number of these workarounds need to be
> >>> implemented by the Guest kernel as well. This creates a problem when
> >>> Guest needs to be migrated to a platform that differs in these
> >>> MIDR/REVIDR values even if the VMM can come up with a common minimum
> >>> feature list for the Guest using the recently introduced "Writable
> >>> ID registers" support.
> >> 
> >> Currently MIDR/REVIDR are still RO and guest access is not trapped - so
> >> even with the errata management patches in place the guest state would
> >> change and a migration (between hosts that differ in these regs) would
> >> not be possible. Are there any plans to allow to actually change these?
> > 
> > Sure thing. We only need a victim! :)
> 
> ;-) Nice. I'll hack smth up then.

Great.

Ideally, you would get rid of all the remaining invariant registers
(MIDR, REVIDR and AIDR). But you must preserve the current behaviour
as the default, sampling these registers on the CPU that initialises
KVM, and preserve the values for userspace to observe unless they are
written to (yes, that's broken, but we're stuck with that).

Also, please don't trap MIDR_EL1. That's very pointless. You only need
to trap REVIDR and AIDR via HCR_EL2.TID1.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.