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Tue, 04 Feb 2025 18:15:13 +0000 Date: Tue, 04 Feb 2025 18:15:11 +0000 Message-ID: <86zfj1tw40.wl-maz@kernel.org> From: Marc Zyngier To: Sebastian Ott Cc: Shameer Kolothum , kvmarm@lists.linux.dev, oliver.upton@linux.dev, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, Cornelia Huck , eric.auger@redhat.com, yuzenghui@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, anthony.jebson@huawei.com, linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com Subject: Re: [PATCH v5 0/4] KVM: arm64: Errata management for VM Live migration In-Reply-To: References: <20250124151732.6072-1-shameerali.kolothum.thodi@huawei.com> <76172c57-aac6-d540-5b98-8de100c0886c@redhat.com> <8634gtvdmi.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sebott@redhat.com, shameerali.kolothum.thodi@huawei.com, kvmarm@lists.linux.dev, oliver.upton@linux.dev, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, cohuck@redhat.com, eric.auger@redhat.com, yuzenghui@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, anthony.jebson@huawei.com, linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_101516_856536_8450A9D8 X-CRM114-Status: GOOD ( 20.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 04 Feb 2025 17:42:04 +0000, Sebastian Ott wrote: > > On Tue, 4 Feb 2025, Marc Zyngier wrote: > > On Tue, 04 Feb 2025 16:45:38 +0000, > > Sebastian Ott wrote: > >> > >> Hey, > >> > >> On Fri, 24 Jan 2025, Shameer Kolothum wrote: > >>> On ARM64 platforms most of the errata workarounds are based on CPU > >>> MIDR/REVIDR values and a number of these workarounds need to be > >>> implemented by the Guest kernel as well. This creates a problem when > >>> Guest needs to be migrated to a platform that differs in these > >>> MIDR/REVIDR values even if the VMM can come up with a common minimum > >>> feature list for the Guest using the recently introduced "Writable > >>> ID registers" support. > >> > >> Currently MIDR/REVIDR are still RO and guest access is not trapped - so > >> even with the errata management patches in place the guest state would > >> change and a migration (between hosts that differ in these regs) would > >> not be possible. Are there any plans to allow to actually change these? > > > > Sure thing. We only need a victim! :) > > ;-) Nice. I'll hack smth up then. Great. Ideally, you would get rid of all the remaining invariant registers (MIDR, REVIDR and AIDR). But you must preserve the current behaviour as the default, sampling these registers on the CPU that initialises KVM, and preserve the values for userspace to observe unless they are written to (yes, that's broken, but we're stuck with that). Also, please don't trap MIDR_EL1. That's very pointless. You only need to trap REVIDR and AIDR via HCR_EL2.TID1. Thanks, M. -- Without deviation from the norm, progress is not possible.