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From: Marc Zyngier <maz@kernel.org>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH v4 06/36] KVM: arm64: nv: Handle CNTHCTL_EL2 specially
Date: Wed, 16 Oct 2024 14:41:33 +0100	[thread overview]
Message-ID: <86zfn4412q.wl-maz@kernel.org> (raw)
In-Reply-To: <Zw-9UvkO6eJkAaYQ@raptor>

On Wed, 16 Oct 2024 14:19:14 +0100,
Alexandru Elisei <alexandru.elisei@arm.com> wrote:
> 
> > > > @@ -207,6 +222,19 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
> > > >  		 */
> > > >  		__vcpu_sys_reg(vcpu, reg) = val;
> > > >  
> > > > +		switch (reg) {
> > > > +		case CNTHCTL_EL2:
> > > > +			/*
> > > > +			 * If E2H=0, CNHTCTL_EL2 is a pure shadow register.
> > > > +			 * Otherwise, some of the bits are backed by
> > > > +			 * CNTKCTL_EL1, while the rest is kept in memory.
> > > > +			 * Yes, this is fun stuff.
> > > > +			 */
> > > > +			if (vcpu_el2_e2h_is_set(vcpu))
> > > > +				write_sysreg_el1(val, SYS_CNTKCTL);
> > > 
> > > Sorry, but I just can't seem to get my head around why the RES0 bits aren't
> > > cleared. Is KVM relying on the guest to implement Should-Be-Zero-or-Preserved,
> > > as per the RES0 definition?
> > 
> > KVM isn't relying on anything. And it isn't about the RES0 bits not
> > being cleared. It is about the HW not providing storage for some of
> > the CNTHCTL_EL2 bits when the guest is using CNTKCTL_EL1 as a proxy
> > for its own view of CNTHCTL_EL2.
> > 
> > Namely, bits outside of CNTKCTL_VALID_BITS are not guaranteed to be
> > stored until (IIRC) FEAT_NV2p1, which retrospectively fixes the
> > architecture by mandating that the relevant bits have dedicated
> > storage.
> 
> The definition for RES0 says:
> 
> 'A bit that is RES0 in a context is reserved for possible future use in that
> context. To preserve forward compatibility, software:
>  * Must not rely on the bit reading as 0.
>  * Must use an SBZP policy to write to the bit.'
> 
> where Should-Be-Zero-of-Preserved (SBZP):
> 
> 'When writing this field, software must either write all 0s to this field or, if
> the register is being restored from a previously read state, write the
> previously read value to this field. If this is not done, then the result is
> unpredictable.'

And? I can quote the ARM ARM too, but that's not going to lead us
anywhere if you don't explain why what you quote is related to the
problem at hand (hint, I don't think it is).

> And what about the rest of the RES0 bits from CNTKCTL_EL1, those that are RES0
> in both registers?

What about them *what*?

It would definitely help if you didn't write in riddles and actually
spell out what you mean. If you think this code is wrong, please
explain why you think it is wrong, and maybe we'll be able to make
some progress.


Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.


  reply	other threads:[~2024-10-16 14:45 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-09 18:59 [PATCH v4 00/36] KVM: arm64: Add EL2 support to FEAT_S1PIE/S1POE Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 01/36] arm64: Drop SKL0/SKL1 from TCR2_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 02/36] arm64: Remove VNCR definition for PIRE0_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 03/36] arm64: Add encoding " Marc Zyngier
2024-10-10 10:46   ` Mark Brown
2024-10-09 18:59 ` [PATCH v4 04/36] KVM: arm64: Drop useless struct s2_mmu in __kvm_at_s1e2() Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 05/36] KVM: arm64: nv: Add missing EL2->EL1 mappings in get_el2_to_el1_mapping() Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 06/36] KVM: arm64: nv: Handle CNTHCTL_EL2 specially Marc Zyngier
2024-10-16  9:37   ` Alexandru Elisei
2024-10-16 11:29     ` Marc Zyngier
2024-10-16 13:19       ` Alexandru Elisei
2024-10-16 13:41         ` Marc Zyngier [this message]
2024-10-09 18:59 ` [PATCH v4 07/36] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2024-10-09 19:55   ` Oliver Upton
2024-10-16 13:12   ` Alexandru Elisei
2024-10-16 13:57     ` Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 08/36] KVM: arm64: Correctly access TCR2_EL1, PIR_EL1, PIRE0_EL1 with VHE Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 09/36] KVM: arm64: Extend masking facility to arbitrary registers Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 10/36] arm64: Define ID_AA64MMFR1_EL1.HAFDBS advertising FEAT_HAFT Marc Zyngier
2024-10-10 16:20   ` Mark Brown
2024-10-09 18:59 ` [PATCH v4 11/36] KVM: arm64: Add TCR2_EL2 to the sysreg arrays Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 12/36] KVM: arm64: Sanitise TCR2_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 13/36] KVM: arm64: Add save/restore for TCR2_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 14/36] KVM: arm64: Add PIR{,E0}_EL2 to the sysreg arrays Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 15/36] KVM: arm64: Add save/restore for PIR{,E0}_EL2 Marc Zyngier
2024-10-09 18:59 ` [PATCH v4 16/36] KVM: arm64: Handle PIR{,E0}_EL2 traps Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 17/36] KVM: arm64: Sanitise ID_AA64MMFR3_EL1 Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 18/36] KVM: arm64: Add AT fast-path support for S1PIE Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 19/36] KVM: arm64: Split S1 permission evaluation into direct and hierarchical parts Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 20/36] KVM: arm64: Disable hierarchical permissions when S1PIE is enabled Marc Zyngier
2024-10-10  7:33   ` Oliver Upton
2024-10-10  8:04     ` Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 21/36] KVM: arm64: Implement AT S1PIE support Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 22/36] KVM: arm64: Define helper for EL2 registers with custom visibility Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 23/36] KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests Marc Zyngier
2024-10-10  7:50   ` Oliver Upton
2024-10-09 19:00 ` [PATCH v4 24/36] KVM: arm64: Hide S1PIE registers " Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 25/36] KVM: arm64: Rely on visibility to let PIR*_ELx/TCR2_ELx UNDEF Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 26/36] arm64: Add encoding for POR_EL2 Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 27/36] KVM: arm64: Add a composite EL2 visibility helper Marc Zyngier
2024-10-10  7:52   ` Oliver Upton
2024-10-09 19:00 ` [PATCH v4 28/36] KVM: arm64: Drop bogus CPTR_EL2.E0POE trap routing Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 29/36] KVM: arm64: Subject S1PIE/S1POE registers to HCR_EL2.{TVM,TRVM} Marc Zyngier
2024-10-10  7:53   ` Oliver Upton
2024-10-09 19:00 ` [PATCH v4 30/36] KVM: arm64: Add basic support for POR_EL2 Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 31/36] KVM: arm64: Add save/retore " Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 32/36] KVM: arm64: Add POE save/restore for AT emulation fast-path Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 33/36] KVM: arm64: Disable hierarchical permissions when POE is enabled Marc Zyngier
2024-10-10  8:08   ` Oliver Upton
2024-10-13 14:27     ` Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 34/36] KVM: arm64: Make PAN conditions part of the S1 walk context Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 35/36] KVM: arm64: Handle stage-1 permission overlays Marc Zyngier
2024-10-09 19:00 ` [PATCH v4 36/36] KVM: arm64: Handle WXN attribute Marc Zyngier

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