From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D244C4727C for ; Thu, 1 Oct 2020 14:14:41 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C6C620872 for ; Thu, 1 Oct 2020 14:14:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WKH9R8Dg"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="QCCMutQG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2C6C620872 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:To:From: Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ztjh+LqNZAYyENimEZXmUoe7OsWAGg6tB45PFZqRSyo=; b=WKH9R8DgGsR1BD3eM/q7ww9sm LUwX/DPpWGLh0XxtWlUkBFdjDtD2u8mTjSh8T0tJgdehNSD52TYewIM6G/B5DwEpJGCgDe6tywc37 tOmvsa/i02ndlqqO4Ol+E17YaOLE3oqS8hx2XzmzSy0pHT+JO5y+mxWXO/GeegLmhIZ686HUUW2Cp qWPTTqXitBqe+PZmNUVhnxGek2Ir9k+CIdaB4Ap2+gudfQyoUjMRhph9SPxriQnS+t4lSlW73Pmhu lBeNNIrrv/2Ej8DjkbEFnlIgbncmFSA0ouBKvjXcCJWhw5VQrTaSFpVVvF75caG76oS2joz5NaQHk 28I6dQCQA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNzKC-00017P-Qh; Thu, 01 Oct 2020 14:12:48 +0000 Received: from ssl.serverraum.org ([176.9.125.105]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNzKA-00016G-2O; Thu, 01 Oct 2020 14:12:47 +0000 Received: from ssl.serverraum.org (web.serverraum.org [172.16.0.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id ADE9122F99; Thu, 1 Oct 2020 16:12:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1601561563; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qodIbGrXANDGKnUR1bw4HfdmzWfDoTXlWQOLVl/G1lM=; b=QCCMutQGnM/MkO/M2OBM5f6bbV86/EX5KZ5MaZqcbaOXLrkdQ2xPqKrqlY39tEKWA+edUz Kn5Y8Ap/5Iz0xg0+OddlEJyArziOBzbD5Gqb2utnXvDdpYOo1QItT8TMuq5Is2XztB3aCL ZamsV+YtiKoOUKZY5VTOH6slwNmKKAg= MIME-Version: 1.0 Date: Thu, 01 Oct 2020 16:12:43 +0200 From: Michael Walle To: Tudor.Ambarus@microchip.com Subject: Re: [RFC PATCH 1/2] mtd: spi-nor: atmel: remove global SNOR_F_HAS_LOCK In-Reply-To: <5eb8f95c-e9d5-6043-fb7d-bffcda044262@microchip.com> References: <20201001122828.23186-1-michael@walle.cc> <5eb8f95c-e9d5-6043-fb7d-bffcda044262@microchip.com> User-Agent: Roundcube Webmail/1.4.8 Message-ID: <871da0d058ba89320615098ee26150b3@walle.cc> X-Sender: michael@walle.cc X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201001_101246_237607_F1504D1E X-CRM114-Status: GOOD ( 20.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: vigneshr@ti.com, richard@nod.at, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am 2020-10-01 16:06, schrieb Tudor.Ambarus@microchip.com: > On 10/1/20 3:28 PM, Michael Walle wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know >> the content is safe >> >> This is considered bad for the following reasons: >> (1) We only support the block protection with BPn bits for write >> protection. Not all Atmel parts support this. >> (2) Newly added flash chip will automatically inherit the "has >> locking" support and thus needs to explicitly tested. Better >> be opt-in instead of opt-out. >> (3) There are already supported flashes which don't support the >> locking >> scheme. So I assume this wasn't properly tested before adding >> that >> chip; which enforces my previous argument that locking >> support should >> be an opt-in. >> >> Remove the global flag and add individual flags to all flashes >> which supports BP locking. In particular the following flashes >> don't support the BP scheme: >> - AT26F004 >> - AT25SL321 >> - AT45DB081D >> >> Signed-off-by: Michael Walle >> --- >> drivers/mtd/spi-nor/atmel.c | 28 +++++++++------------------- >> 1 file changed, 9 insertions(+), 19 deletions(-) >> >> diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c >> index 3f5f21a473a6..49d392c6c8bc 100644 >> --- a/drivers/mtd/spi-nor/atmel.c >> +++ b/drivers/mtd/spi-nor/atmel.c >> @@ -10,37 +10,27 @@ >> >> static const struct flash_info atmel_parts[] = { >> /* Atmel -- some are (confusingly) marketed as "DataFlash" */ >> - { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K) }, >> - { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) }, >> + { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K | >> SPI_NOR_HAS_LOCK) }, >> + { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K | >> SPI_NOR_HAS_LOCK) }, > > after a quick look in the datasheets of these flashes, I suspect that > what we have now in the SPI NOR core for SR locking does not work for > them. They probably supported just "unlock all", clearing all the > BP bits. Anyway, different problem. >> >> - { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) }, >> - { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) }, >> - { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) }, >> - { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) }, >> + { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K | >> SPI_NOR_HAS_LOCK) }, > > this one does not support BP locking: > https://www.adestotech.com/wp-content/uploads/doc3668.pdf > >> + { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K | >> SPI_NOR_HAS_LOCK) }, > > neither this one: > https://datasheet.octopart.com/AT25DF321-S3U-Atmel-datasheet-8700896.pdf > >> + { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K | >> SPI_NOR_HAS_LOCK) }, > > nor this one: https://www.adestotech.com/wp-content/uploads/doc3686.pdf > >> + { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K | >> SPI_NOR_HAS_LOCK) }, > > nor this one: https://www.adestotech.com/wp-content/uploads/doc3680.pdf > > I stop here. These are all the ones which use the global unlock. I cannot just skip the HAS_LOCK bit here, because otherwise this patch wouldn't be backwards compatibe. Yes I missed that in the commit log, my bad. -michael _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel