From: Marc Zyngier <maz@kernel.org>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org, James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Joey Gouly <joey.gouly@arm.com>
Subject: Re: [PATCH 02/12] arm64: Add PAR_EL1 field description
Date: Sat, 13 Jul 2024 08:56:42 +0100 [thread overview]
Message-ID: <871q3xpvwl.wl-maz@kernel.org> (raw)
In-Reply-To: <b9b8775f-8dc1-4a9d-a884-7103f18d68f1@arm.com>
On Fri, 12 Jul 2024 08:06:31 +0100,
Anshuman Khandual <anshuman.khandual@arm.com> wrote:
>
>
>
> On 6/25/24 19:05, Marc Zyngier wrote:
> > As KVM is about to grow a full emulation for the AT instructions,
> > add the layout of the PAR_EL1 register in its non-D128 configuration.
>
> Right, there are two variants for PAR_EL1 i.e D128 and non-D128. Probably it makes
> sense to define all these PAR_EL1 fields in arch/arm64/include/asm/sysreg.h, until
> arch/arm64/tools/sysreg evolves to accommodate different bit field layouts for the
> same register.
This is really sorely needed, because we can't describe any of the
registers that changes layout depending on another control bit. Take
for example any of the EL2 registers affected by HCR_EL2.E2H.
However, I have no interest in defining *any* D128 format. I take it
that whoever will eventually add D128 support to the kernel (and KVM)
will take care of that.
>
> >
> > Note that the constants are a bit ugly, as the register has two
> > layouts, based on the state of the F bit.
>
> Just wondering if it would be better to append 'VALID/INVALID' suffix
> for the fields to differentiate between when F = 0 and when F = 1 ?
>
> s/SYS_PAR_EL1_FST/SYS_PAR_INVALID_FST_EL1
> s/SYS_PAR_EL1_SH/SYS_PAR_VALID_SH_EL1
>
> Or something similar.
I find it pretty horrible.
If anything, because "VALID/INVALID" doesn't say anything of *what* is
invalid. Also, there is no "VALID" definition in the register, and an
aborted translation does not make the register invalid, quite the
opposite -- it is full of crucial information.
Which is why I used the F0/F1 prefixes, making it clear (at least in
my view) that the description is tied to a particular value of the
PAR_EL1.F bit.
Finally, most of the bit layouts are unambiguous: a field of any given
name only exists in a given layout of the register. This means we can
safely have names that match the ARM ARM description without any
visual pollution.
The only ambiguities are with generic names such as RES0 and IMPDEF.
Given that we almost never use these bits for anything, I don't think
the use of a F-specific prefix is a problem.
But yeah, naming is hard.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2024-07-13 7:57 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-25 13:34 [PATCH 00/12] KVM: arm64: nv: Add support for address translation instructions Marc Zyngier
2024-06-25 13:35 ` [PATCH 01/12] arm64: Add missing APTable and TCR_ELx.HPD masks Marc Zyngier
2024-07-12 8:32 ` Anshuman Khandual
2024-07-13 8:04 ` Marc Zyngier
2024-06-25 13:35 ` [PATCH 02/12] arm64: Add PAR_EL1 field description Marc Zyngier
2024-07-12 7:06 ` Anshuman Khandual
2024-07-13 7:56 ` Marc Zyngier [this message]
2024-06-25 13:35 ` [PATCH 03/12] KVM: arm64: nv: Turn upper_attr for S2 walk into the full descriptor Marc Zyngier
2024-06-25 13:35 ` [PATCH 04/12] KVM: arm64: nv: Honor absence of FEAT_PAN2 Marc Zyngier
2024-07-12 8:40 ` Anshuman Khandual
2024-06-25 13:35 ` [PATCH 05/12] KVM: arm64: make kvm_at() take an OP_AT_* Marc Zyngier
2024-07-12 8:52 ` Anshuman Khandual
2024-06-25 13:35 ` [PATCH 06/12] KVM: arm64: nv: Add basic emulation of AT S1E{0,1}{R,W}[P] Marc Zyngier
2024-06-25 13:35 ` [PATCH 07/12] KVM: arm64: nv: Add basic emulation of AT S1E2{R,W} Marc Zyngier
2024-06-25 13:35 ` [PATCH 08/12] KVM: arm64: nv: Add emulation of AT S12E{0,1}{R,W} Marc Zyngier
2024-07-18 15:10 ` Alexandru Elisei
2024-07-20 9:49 ` Marc Zyngier
2024-07-22 10:33 ` Alexandru Elisei
2024-06-25 13:35 ` [PATCH 09/12] KVM: arm64: nv: Make ps_to_output_size() generally available Marc Zyngier
2024-07-08 16:28 ` [PATCH 00/12] KVM: arm64: nv: Add support for address translation instructions Alexandru Elisei
2024-07-08 17:00 ` Marc Zyngier
2024-07-08 16:57 ` [PATCH 10/12] KVM: arm64: nv: Add SW walker for AT S1 emulation Marc Zyngier
2024-07-08 16:57 ` [PATCH 11/12] KVM: arm64: nv: Plumb handling of AT S1* traps from EL2 Marc Zyngier
2024-07-08 16:58 ` [PATCH 12/12] KVM: arm64: nv: Add support for FEAT_ATS1A Marc Zyngier
2024-07-10 15:12 ` [PATCH 10/12] KVM: arm64: nv: Add SW walker for AT S1 emulation Alexandru Elisei
2024-07-11 8:05 ` Marc Zyngier
2024-07-11 10:56 ` Alexandru Elisei
2024-07-11 12:16 ` Marc Zyngier
2024-07-15 15:30 ` Alexandru Elisei
2024-07-18 11:37 ` Marc Zyngier
2024-07-18 15:16 ` Alexandru Elisei
2024-07-20 13:49 ` Marc Zyngier
2024-07-22 10:53 ` Alexandru Elisei
2024-07-22 15:25 ` Marc Zyngier
2024-07-23 8:57 ` Alexandru Elisei
2024-07-25 14:16 ` Alexandru Elisei
2024-07-25 14:30 ` Marc Zyngier
2024-07-25 15:13 ` Alexandru Elisei
2024-07-25 15:33 ` Marc Zyngier
2024-07-29 15:26 ` Alexandru Elisei
2024-07-31 8:55 ` Marc Zyngier
2024-07-31 9:53 ` Alexandru Elisei
2024-07-31 10:18 ` Marc Zyngier
2024-07-31 10:28 ` Alexandru Elisei
2024-07-31 14:33 ` Alexandru Elisei
2024-07-31 15:43 ` Marc Zyngier
2024-07-31 16:05 ` Alexandru Elisei
2024-07-31 10:05 ` [PATCH 00/12] KVM: arm64: nv: Add support for address translation instructions Alexandru Elisei
2024-07-31 11:02 ` Marc Zyngier
2024-07-31 14:19 ` Alexandru Elisei
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