[PATCH] arm64: cpufeature: fix CPU features mismatch message

[PATCH] arm64: cpufeature: fix CPU features mismatch message

[Dmitry Baryshkov]

Fix cpp magic involved in ARM64_FTR_REG/ARM64_FTR_REG_OVERRIDE macros.
Currently ARM64_FTR_REG parameters are expanded early, resulting in
cryptic debug messages:

[    0.071123] CPU features: SANITY CHECK: Unexpected variation in (((3) << 19) | ((0) << 16) | ((0) << 12) | ((7) << 8) | ((0) << 5)). Boot CPU: 0x00022200101022, CPU4: 0x00022200101122

Make ARM64_FTR_REG to be expanded before parameters, resulting in proper
debug log:

[    0.071163] CPU features: SANITY CHECK: Unexpected variation in SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00022200101022, CPU4: 0x00022200101122

Fixes: 8f266a5d878a ("arm64: cpufeature: Add global feature override facility")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/kernel/cpufeature.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6ec7036ef7e1..72e3e3819eb4 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -573,15 +573,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {
 	ARM64_FTR_END,
 };
 
-#define ARM64_FTR_REG_OVERRIDE(id, table, ovr) {		\
+#define __ARM64_FTR_REG(id, _name, table, ovr) {		\
 		.sys_id = id,					\
 		.reg = 	&(struct arm64_ftr_reg){		\
-			.name = #id,				\
+			.name = _name,				\
 			.override = (ovr),			\
 			.ftr_bits = &((table)[0]),		\
 	}}
 
-#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, &no_override)
+#define ARM64_FTR_REG_OVERRIDE(id, table, ovr) __ARM64_FTR_REG(id, #id, table, ovr)
+
+#define ARM64_FTR_REG(id, table) __ARM64_FTR_REG(id, #id, table, &no_override)
 
 struct arm64_ftr_override __ro_after_init id_aa64mmfr1_override;
 struct arm64_ftr_override __ro_after_init id_aa64pfr1_override;
-- 
2.33.0


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Re: [PATCH] arm64: cpufeature: fix CPU features mismatch message

[Marc Zyngier]

On Tue, 16 Nov 2021 21:59:22 +0000,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> wrote:
> 
> Fix cpp magic involved in ARM64_FTR_REG/ARM64_FTR_REG_OVERRIDE macros.
> Currently ARM64_FTR_REG parameters are expanded early, resulting in
> cryptic debug messages:
> 
> [    0.071123] CPU features: SANITY CHECK: Unexpected variation in (((3) << 19) | ((0) << 16) | ((0) << 12) | ((7) << 8) | ((0) << 5)). Boot CPU: 0x00022200101022, CPU4: 0x00022200101122
> 
> Make ARM64_FTR_REG to be expanded before parameters, resulting in proper
> debug log:
> 
> [    0.071163] CPU features: SANITY CHECK: Unexpected variation in SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00022200101022, CPU4: 0x00022200101122
> 
> Fixes: 8f266a5d878a ("arm64: cpufeature: Add global feature override facility")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  arch/arm64/kernel/cpufeature.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 6ec7036ef7e1..72e3e3819eb4 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -573,15 +573,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {
>  	ARM64_FTR_END,
>  };
>  
> -#define ARM64_FTR_REG_OVERRIDE(id, table, ovr) {		\
> +#define __ARM64_FTR_REG(id, _name, table, ovr) {		\
>  		.sys_id = id,					\
>  		.reg = 	&(struct arm64_ftr_reg){		\
> -			.name = #id,				\
> +			.name = _name,				\
>  			.override = (ovr),			\
>  			.ftr_bits = &((table)[0]),		\
>  	}}
>  
> -#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, &no_override)
> +#define ARM64_FTR_REG_OVERRIDE(id, table, ovr) __ARM64_FTR_REG(id, #id, table, ovr)
> +
> +#define ARM64_FTR_REG(id, table) __ARM64_FTR_REG(id, #id, table, &no_override)
>  
>  struct arm64_ftr_override __ro_after_init id_aa64mmfr1_override;
>  struct arm64_ftr_override __ro_after_init id_aa64pfr1_override;

Please see commit 9dc232a8ab18 ("arm64: arm64_ftr_reg->name may not be
a human-readable string").

	M.

-- 
Without deviation from the norm, progress is not possible.

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