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From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Joey Gouly <joey.gouly@arm.com>,
	kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Cornelia Huck <cohuck@redhat.com>
Subject: Re: [PATCH v2 4/5] KVM: arm64: Expose FEAT_RASv1p1 in a canonical manner
Date: Sat, 09 Aug 2025 21:21:39 +0100	[thread overview]
Message-ID: <8734a0tfe4.wl-maz@kernel.org> (raw)
In-Reply-To: <aJZ-wCLYh_STGiTI@linux.dev>

On Fri, 08 Aug 2025 23:48:32 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
> 
> On Thu, Aug 07, 2025 at 01:55:31PM +0100, Joey Gouly wrote:
> > On Wed, Aug 06, 2025 at 05:56:14PM +0100, Marc Zyngier wrote:
> > > If we have RASv1p1 on the host, advertise it to the guest in the
> > > "canonical way", by setting ID_AA64PFR0_EL1 to V1P1, rather than
> > > the convoluted RAS+RAS_frac method.
> > > 
> > > Note that this also advertises FEAT_DoubleFault, which doesn't
> > > affect the guest at all, as only EL3 is concerned by this.
> > > 
> > > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > > ---
> > >  arch/arm64/kvm/sys_regs.c | 12 ++++++++++++
> > >  1 file changed, 12 insertions(+)
> > > 
> > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > > index 1b4114790024e..66e5a733e9628 100644
> > > --- a/arch/arm64/kvm/sys_regs.c
> > > +++ b/arch/arm64/kvm/sys_regs.c
> > > @@ -1800,6 +1800,18 @@ static u64 sanitise_id_aa64pfr0_el1(const struct kvm_vcpu *vcpu, u64 val)
> > >  	if (!vcpu_has_sve(vcpu))
> > >  		val &= ~ID_AA64PFR0_EL1_SVE_MASK;
> > >  
> > > +	/*
> > > +	 * Describe RASv1p1 in a canonical way -- ID_AA64PFR1_EL1.RAS_frac
> > > +	 * is cleared separately. Note that by advertising RASv1p1 here, we
> > 
> > Where is it cleared? __kvm_read_sanitised_id_reg() is where I would have
> > expected to see it:
> 
> Actually, I'm a bit worried this change doesn't give us very much value
> since Marc already does the exhaustive RASv1p1 check in the sysreg
> emulation.
> 
> There's potential for breakage when migrating VMs between new/old kernels
> on systems w/ FEAT_RASv1p1 && !FEAT_DoubleFault.
> 
> Marc, WDYT about dropping this patch and instead opening up RAS_frac to
> writes?

That's indeed probably best. But the question I can't manage to answer
right now is how we migrate RASv1p1 between the two versions? It means
cross-idreg dependencies, ordering and all that, and I'm a bit
reluctant to do so.

Thoughts?

	M.

-- 
Jazz isn't dead. It just smells funny.


  reply	other threads:[~2025-08-09 20:24 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-06 16:56 [PATCH v2 0/5] KVM: arm64: FEAT_RASv1p1 support and RAS selection Marc Zyngier
2025-08-06 16:56 ` [PATCH v2 1/5] arm64: Add capability denoting FEAT_RASv1p1 Marc Zyngier
2025-08-06 16:56 ` [PATCH v2 2/5] KVM: arm64: Handle RASv1p1 registers Marc Zyngier
2025-08-07 11:12   ` Joey Gouly
2025-08-06 16:56 ` [PATCH v2 3/5] KVM: arm64: Ignore HCR_EL2.FIEN set by L1 guest's EL2 Marc Zyngier
2025-08-06 16:56 ` [PATCH v2 4/5] KVM: arm64: Expose FEAT_RASv1p1 in a canonical manner Marc Zyngier
2025-08-07 12:55   ` Joey Gouly
2025-08-08 22:48     ` Oliver Upton
2025-08-09 20:21       ` Marc Zyngier [this message]
2025-08-12 20:30         ` Oliver Upton
2025-08-09 20:19     ` Marc Zyngier
2025-08-12  9:12       ` Cornelia Huck
2025-08-06 16:56 ` [PATCH v2 5/5] KVM: arm64: Make ID_AA64PFR0_EL1.RAS writable Marc Zyngier

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