From: Punit Agrawal <punit.agrawal@bytedance.com>
To: Usama Arif <usama.arif@bytedance.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-doc@vger.kernel.org,
virtualization@lists.linux-foundation.org,
linux@armlinux.org.uk, yezengruan@huawei.com,
catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
steven.price@arm.com, mark.rutland@arm.com,
bagasdotme@gmail.com, fam.zheng@bytedance.com,
liangma@liangbit.com, punit.agrawal@bytedance.com
Subject: Re: [v2 3/6] KVM: arm64: Support pvlock preempted via shared structure
Date: Mon, 07 Nov 2022 18:02:01 +0000 [thread overview]
Message-ID: <8735au3ap2.fsf@stealth> (raw)
In-Reply-To: 20221104062105.4119003-4-usama.arif@bytedance.com
Usama Arif <usama.arif@bytedance.com> writes:
> Implement the service call for configuring a shared structure between a
> VCPU and the hypervisor in which the hypervisor can tell whether the
> VCPU is running or not.
>
> The preempted field is zero if the VCPU is not preempted.
> Any other value means the VCPU has been preempted.
>
> Signed-off-by: Zengruan Ye <yezengruan@huawei.com>
> Signed-off-by: Usama Arif <usama.arif@bytedance.com>
> ---
> Documentation/virt/kvm/arm/hypercalls.rst | 3 ++
> arch/arm64/include/asm/kvm_host.h | 18 ++++++++++
> arch/arm64/include/uapi/asm/kvm.h | 1 +
> arch/arm64/kvm/Makefile | 2 +-
> arch/arm64/kvm/arm.c | 8 +++++
> arch/arm64/kvm/hypercalls.c | 8 +++++
> arch/arm64/kvm/pvlock.c | 43 +++++++++++++++++++++++
> tools/arch/arm64/include/uapi/asm/kvm.h | 1 +
> 8 files changed, 83 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/kvm/pvlock.c
>
> diff --git a/Documentation/virt/kvm/arm/hypercalls.rst b/Documentation/virt/kvm/arm/hypercalls.rst
> index 3e23084644ba..872a16226ace 100644
> --- a/Documentation/virt/kvm/arm/hypercalls.rst
> +++ b/Documentation/virt/kvm/arm/hypercalls.rst
> @@ -127,6 +127,9 @@ The pseudo-firmware bitmap register are as follows:
> Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
> The bit represents the Precision Time Protocol KVM service.
>
> + Bit-2: KVM_REG_ARM_VENDOR_HYP_BIT_PV_LOCK:
> + The bit represents the Paravirtualized lock service.
> +
> Errors:
>
> ======= =============================================================
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index 45e2136322ba..18303b30b7e9 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -417,6 +417,11 @@ struct kvm_vcpu_arch {
> u64 last_steal;
> gpa_t base;
> } steal;
> +
> + /* Guest PV lock state */
> + struct {
> + gpa_t base;
> + } pv;
Using "pv" for the structure isn't quite describing the usage well. It'd
be better to call it "pv_lock" or "pvlock" at the least.
[...]
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next prev parent reply other threads:[~2022-11-07 18:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-04 6:20 [v2 0/6] KVM: arm64: implement vcpu_is_preempted check Usama Arif
2022-11-04 6:21 ` [v2 1/6] KVM: arm64: Document PV-lock interface Usama Arif
2022-11-07 17:56 ` Punit Agrawal
2022-11-07 18:05 ` Usama Arif
2022-11-04 6:21 ` [v2 2/6] KVM: arm64: Add SMCCC paravirtualised lock calls Usama Arif
2022-11-07 17:58 ` Punit Agrawal
2022-11-07 18:08 ` Usama Arif
2022-11-04 6:21 ` [v2 3/6] KVM: arm64: Support pvlock preempted via shared structure Usama Arif
2022-11-07 18:02 ` Punit Agrawal [this message]
2022-11-07 18:09 ` Usama Arif
2022-11-04 6:21 ` [v2 4/6] KVM: arm64: Provide VCPU attributes for PV lock Usama Arif
2022-11-04 6:21 ` [v2 5/6] KVM: arm64: Support the VCPU preemption check Usama Arif
2022-11-04 6:21 ` [v2 6/6] KVM: selftests: add tests for PV time specific hypercall Usama Arif
2022-11-04 9:02 ` [v2 0/6] KVM: arm64: implement vcpu_is_preempted check Marc Zyngier
2022-11-06 16:35 ` Marc Zyngier
2022-11-07 12:00 ` [External] " Usama Arif
2022-11-18 0:20 ` Marc Zyngier
2022-11-24 13:55 ` Usama Arif
2022-12-05 13:43 ` Usama Arif
2023-01-17 10:50 ` Usama Arif
2022-11-07 18:24 ` Punit Agrawal
2022-11-09 19:38 ` Usama Arif
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