From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDEF2C433EF for ; Fri, 21 Jan 2022 09:19:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Vt0aSzLTQ0CtedUW+3IxjV92PgYISrEFwFubOZotWcU=; b=CkcSJrXDpybq5h ZUG/CCnNYiHNLmwyg6Nl0vF3SsRufeyAoedcpv2HewyeZcxf0+M/kKJ6x2kcztEbDL5gWgDexLXv1 bEYZnvysTnXhEtPEFQlDONflp5c5+iVOXt2/f1aoYpQY+kj4Bty1mtbHcBswCP3wD1l10DjlE0Mx5 v3MNaTUcLkG5PlAP4lsr1My0HEbuVBUOs491RgM4Xc4+BkR+uBSffrQtH130aDhBh4kd+n++P7fQh Zpebt5NCiPf/4VhJw0I19a+uee61MDb2wcV8VTQXbOkDfmSJ6GQewpttOtCyCTIxB3IywPaQ3SG4C wuK2PXYygnnkBxqSuarQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAq3S-00ERJy-JY; Fri, 21 Jan 2022 09:17:58 +0000 Received: from relay8-d.mail.gandi.net ([2001:4b98:dc4:8::228]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAq3O-00ERJF-4o for linux-arm-kernel@lists.infradead.org; Fri, 21 Jan 2022 09:17:56 +0000 Received: (Authenticated sender: gregory.clement@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A26D21BF205; Fri, 21 Jan 2022 09:17:49 +0000 (UTC) From: Gregory CLEMENT To: Andy Shevchenko , Andy Shevchenko , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Andrew Lunn , Sebastian Hesselbarth , Russell King Subject: Re: [PATCH v2 1/1] ARM: orion/gpio: Get rid of unused first parameter in orion_gpio_init() In-Reply-To: <20211214140656.53694-1-andriy.shevchenko@linux.intel.com> References: <20211214140656.53694-1-andriy.shevchenko@linux.intel.com> Date: Fri, 21 Jan 2022 10:17:49 +0100 Message-ID: <8735lh5txe.fsf@BL-laptop> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220121_011754_507287_F5751770 X-CRM114-Status: GOOD ( 20.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Andy Shevchenko writes: > The OF node pointer is always NULL, get rid of unused parameter in > orion_gpio_init(). As a side effect it will allow to switch GPIO > library to the fwnode API, as well as in case of resurrecting it here > it should be fwnode_handle anyways. > > Signed-off-by: Andy Shevchenko Applied on mvebu/arm Thanks, Gregory > --- > v2: wrapped to 80 limit (Russell) > arch/arm/mach-dove/irq.c | 6 +++--- > arch/arm/mach-mv78xx0/irq.c | 3 +-- > arch/arm/mach-orion5x/irq.c | 2 +- > arch/arm/plat-orion/gpio.c | 8 ++------ > arch/arm/plat-orion/include/plat/orion-gpio.h | 3 +-- > 5 files changed, 8 insertions(+), 14 deletions(-) > > diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c > index 31ccbcee2627..d36f6b8269c2 100644 > --- a/arch/arm/mach-dove/irq.c > +++ b/arch/arm/mach-dove/irq.c > @@ -73,12 +73,12 @@ void __init dove_init_irq(void) > /* > * Initialize gpiolib for GPIOs 0-71. > */ > - orion_gpio_init(NULL, 0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, > + orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, > IRQ_DOVE_GPIO_START, gpio0_irqs); > > - orion_gpio_init(NULL, 32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, > + orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, > IRQ_DOVE_GPIO_START + 32, gpio1_irqs); > > - orion_gpio_init(NULL, 64, 8, DOVE_GPIO2_VIRT_BASE, 0, > + orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0, > IRQ_DOVE_GPIO_START + 64, gpio2_irqs); > } > diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c > index 788569e960e1..0b5f055ca1c3 100644 > --- a/arch/arm/mach-mv78xx0/irq.c > +++ b/arch/arm/mach-mv78xx0/irq.c > @@ -67,7 +67,6 @@ void __init mv78xx0_init_irq(void) > * registers for core #1 are at an offset of 0x18 from those of > * core #0.) > */ > - orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, > - mv78xx0_core_index() ? 0x18 : 0, > + orion_gpio_init(0, 32, GPIO_VIRT_BASE, mv78xx0_core_index() ? 0x18 : 0, > IRQ_MV78XX0_GPIO_START, gpio0_irqs); > } > diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c > index ac4af2283bef..1ae775d02d90 100644 > --- a/arch/arm/mach-orion5x/irq.c > +++ b/arch/arm/mach-orion5x/irq.c > @@ -49,6 +49,6 @@ void __init orion5x_init_irq(void) > /* > * Initialize gpiolib for GPIOs 0-31. > */ > - orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, 0, > + orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, > IRQ_ORION5X_GPIO_START, gpio0_irqs); > } > diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c > index 734f0be4f14a..3ef9ecdd6343 100644 > --- a/arch/arm/plat-orion/gpio.c > +++ b/arch/arm/plat-orion/gpio.c > @@ -516,8 +516,7 @@ static void orion_gpio_mask_irq(struct irq_data *d) > irq_gc_unlock(gc); > } > > -void __init orion_gpio_init(struct device_node *np, > - int gpio_base, int ngpio, > +void __init orion_gpio_init(int gpio_base, int ngpio, > void __iomem *base, int mask_offset, > int secondary_irq_base, > int irqs[4]) > @@ -545,9 +544,6 @@ void __init orion_gpio_init(struct device_node *np, > ochip->chip.base = gpio_base; > ochip->chip.ngpio = ngpio; > ochip->chip.can_sleep = 0; > -#ifdef CONFIG_OF > - ochip->chip.of_node = np; > -#endif > ochip->chip.dbg_show = orion_gpio_dbg_show; > > spin_lock_init(&ochip->lock); > @@ -605,7 +601,7 @@ void __init orion_gpio_init(struct device_node *np, > IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); > > /* Setup irq domain on top of the generic chip. */ > - ochip->domain = irq_domain_add_legacy(np, > + ochip->domain = irq_domain_add_legacy(NULL, > ochip->chip.ngpio, > ochip->secondary_irq_base, > ochip->secondary_irq_base, > diff --git a/arch/arm/plat-orion/include/plat/orion-gpio.h b/arch/arm/plat-orion/include/plat/orion-gpio.h > index e856b073a9c8..25a2963e0e0f 100644 > --- a/arch/arm/plat-orion/include/plat/orion-gpio.h > +++ b/arch/arm/plat-orion/include/plat/orion-gpio.h > @@ -30,8 +30,7 @@ int orion_gpio_led_blink_set(struct gpio_desc *desc, int state, > void orion_gpio_set_valid(unsigned pin, int mode); > > /* Initialize gpiolib. */ > -void __init orion_gpio_init(struct device_node *np, > - int gpio_base, int ngpio, > +void __init orion_gpio_init(int gpio_base, int ngpio, > void __iomem *base, int mask_offset, > int secondary_irq_base, > int irq[4]); > -- > 2.33.0 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel