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Sat, 09 Aug 2025 21:19:08 +0100 Date: Sat, 09 Aug 2025 21:19:08 +0100 Message-ID: <874iugtfib.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Suzuki K Poulose , Oliver Upton , Zenghui Yu , Will Deacon , Catalin Marinas , Cornelia Huck Subject: Re: [PATCH v2 4/5] KVM: arm64: Expose FEAT_RASv1p1 in a canonical manner In-Reply-To: <20250807125531.GB2351327@e124191.cambridge.arm.com> References: <20250806165615.1513164-1-maz@kernel.org> <20250806165615.1513164-5-maz@kernel.org> <20250807125531.GB2351327@e124191.cambridge.arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, will@kernel.org, catalin.marinas@arm.com, cohuck@redhat.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250809_131913_067738_C580ED08 X-CRM114-Status: GOOD ( 24.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 07 Aug 2025 13:55:31 +0100, Joey Gouly wrote: > > On Wed, Aug 06, 2025 at 05:56:14PM +0100, Marc Zyngier wrote: > > If we have RASv1p1 on the host, advertise it to the guest in the > > "canonical way", by setting ID_AA64PFR0_EL1 to V1P1, rather than > > the convoluted RAS+RAS_frac method. > > > > Note that this also advertises FEAT_DoubleFault, which doesn't > > affect the guest at all, as only EL3 is concerned by this. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/sys_regs.c | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > index 1b4114790024e..66e5a733e9628 100644 > > --- a/arch/arm64/kvm/sys_regs.c > > +++ b/arch/arm64/kvm/sys_regs.c > > @@ -1800,6 +1800,18 @@ static u64 sanitise_id_aa64pfr0_el1(const struct kvm_vcpu *vcpu, u64 val) > > if (!vcpu_has_sve(vcpu)) > > val &= ~ID_AA64PFR0_EL1_SVE_MASK; > > > > + /* > > + * Describe RASv1p1 in a canonical way -- ID_AA64PFR1_EL1.RAS_frac > > + * is cleared separately. Note that by advertising RASv1p1 here, we > > Where is it cleared? __kvm_read_sanitised_id_reg() is where I would have > expected to see it: > > case SYS_ID_AA64PFR1_EL1: [...] Ah crap, it is the nested code that we get rid of it, nowhere else. Which means that non-nested VMs have already observed RAS_frac. What a mess. Then RAS_frac must be exposed as writable. The question is whether we want to allow migration between one flavour of RASv1p1 and the other. M. -- Jazz isn't dead. It just smells funny.