From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F982CD8CA9 for ; Tue, 10 Oct 2023 16:37:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=F5SJCf7663k8Ah7AlDEIjzUMtUBf85xrSYmsuuyqm3s=; b=2U/1e+485wTlHh GAqoBzYlP/QFG0DKeTiIvUH62As9CfvRkWJqiLVFxdZahDm25aOqSLy+2L/LVrzrj+O4cOr5lyU4x Z9uR0e4GxYQfWQgfNGJL+1OM/PasU0qA9D0haKElPeqF9NWQyCEfrnDz/+VuFZce4A8UY2Efr1aqb gNdptpufJxxeh4nEPgeXOuy3RaQ1iIqnxJxQH2oZr9Rv4TCKeTVjMc4PyW3SGruga6IHib/NTSyjs hcStc3ltAjCDWO0DGuLqLPNfHAM5DIsNZQFlaxgoDBh/cvEmFI2zPjRZVutcqB1G4eA/FKqb9bDIS 5cUznv+ubnrbCHstzuiQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqFjI-00DmGV-00; Tue, 10 Oct 2023 16:37:08 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qqFjB-00DmFf-2d for linux-arm-kernel@lists.infradead.org; Tue, 10 Oct 2023 16:37:06 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id DD668CE1857; Tue, 10 Oct 2023 16:36:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2513DC433C7; Tue, 10 Oct 2023 16:36:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696955818; bh=W2xIKe9L/LI5ekQDMfwHG7XAOQIQ9z/WMjX7Z1TYmxQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=D9B6K+j5Di39Lds6hkOZ3g552VZGLNdd2uYMqqy3T4H2GzrODYEn++a2HFFR6SawY zNfMNqw8HbxH6OK4V7ZDDamXqMKAjx4kBRhOveJBjYNc0OxTwNg/QIAji8kyfxxEPU 6w9RnP72uLoNZ7CUWF0lTHIPn5dMU4Ru7mR/8UaMtmSC0TUykWcBKZbZG2HKAeOYN8 SMw4YuHHdYcBWP4cVKi4LeMvxR1yTo58Mw910astCLG4hVtXiiD8wXtw3Y5RgRIfPL rTgVXP8705qYkFzoNQley5S9SZYkqmQ4J4dKwadbEKJqx4Qczysn4h6wpPOdwLC6gm DVK91u5VfEbAg== Received: from [104.132.1.97] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qqFj4-002rfh-Tw; Tue, 10 Oct 2023 17:36:55 +0100 Date: Tue, 10 Oct 2023 17:36:50 +0100 Message-ID: <874jiymo2l.wl-maz@kernel.org> From: Marc Zyngier To: Yicong Yang Cc: , , , , , , , , , , , Subject: Re: [RFC PATCH 0/3] Add HiSilicon system timer driver In-Reply-To: <20231010123033.23258-1-yangyicong@huawei.com> References: <20231010123033.23258-1-yangyicong@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 104.132.1.97 X-SA-Exim-Rcpt-To: yangyicong@huawei.com, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, jonathan.cameron@huawei.com, prime.zeng@huawei.com, wanghuiqiang@huawei.com, wangwudi@hisilicon.com, guohanjun@huawei.com, yangyicong@hisilicon.com, linuxarm@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231010_093702_454625_69B84BA2 X-CRM114-Status: GOOD ( 17.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 10 Oct 2023 13:30:30 +0100, Yicong Yang wrote: > > From: Yicong Yang > > HiSilicon system timer is a memory mapped platform timer compatible with > the arm's generic timer specification. The timer supports both SPI and > LPI interrupt and can be enumerated through ACPI DSDT table. Since the > timer is fully compatible with the spec, it can reuse most codes of the > arm_arch_timer driver. However since the arm_arch_timer driver only > supports GTDT and SPI interrupt, this series support the HiSilicon system > timer by: > > - refactor some of the arm_arch_timer codes and export the function to > register a arch memory timer by other drivers > - retrieve the IO memory and interrupt resource through DSDT in a separate > driver, then setup and register the clockevent device reuse the arm_arch_timer > function > > Using LPI for the timer is mentioned in BSA Spec section 3.8.1 (DEN0094C 1.0C). This strikes me as pretty odd. LPIs are, by definition, *edge* triggered. The timer interrupt must be *level* triggered. So there must be some bridge in the middle that is going to regenerate edges on EOI, and that cannot be architectural. What am I missing? Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel