From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16295C433F5 for ; Tue, 15 Mar 2022 13:32:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:In-reply-to: Date:Subject:Cc:To:From:References:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5Hov64xrQTJfU+DgxDBOx1Lj8qRSACOLj96psDqNkow=; b=ZRlz/rLCgSqVcb 5AyK/OsW3sIkN9L9nvJZt22Vg9Rzxsp7k2dEtMxsQo5ctsjgOKG6cRMUyiU39dW9+iWfX7EWp21GL nJdAeIFI/X2BSaiizW6AHtUbYvmHZZG3AHStnzDF9+Q6bX4s5UqBKZxSDjK8GwkYKeF4evCu8U1ik UOdWJAUhHmgWC2dsI/Bv/nuw3Fb3MoMoRPwQ6t/SrD9rJesoZnUpoYvB0k/oHkLdMgBjSlkL53Mbo RlRusNh4MTQklV03PjQoSMLtUbNyTb3U8Cu6zKwwvOdxR2SPn1+vKnf1UxoJDwshs5SVHMRl3QV2A 4Xa2RTqsHKu6OlMs1ulw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nU7G6-009D7s-Up; Tue, 15 Mar 2022 13:30:43 +0000 Received: from guitar.tcltek.co.il ([84.110.109.230] helo=mail.tkos.co.il) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nU7Fv-009D3I-Vc for linux-arm-kernel@lists.infradead.org; Tue, 15 Mar 2022 13:30:34 +0000 Received: from tarshish (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.tkos.co.il (Postfix) with ESMTPS id 4666F440F5D; Tue, 15 Mar 2022 15:30:16 +0200 (IST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tkos.co.il; s=default; t=1647351016; bh=CY+SaTv7DiySVo1WF/fc6BtFxgmDymR8eVZ4mS1oh5Y=; h=References:From:To:Cc:Subject:Date:In-reply-to:From; b=gOtJ0xeGrT6X4sG3OuUhtwFr4RC7qy0HKBzBxGRnChmoAKtJLujpBBBCIfsjJ2eSX ZVoceqcIQxEVaerH6WmxeOdj7ov425txeWr+/3DAzNILvM/qJcpPCA6Gvi/JPD9DeM S6OKPfDVAcDGKqgk9G72Vvh6a07zhlyM6PuGvevEIXlwdCT8ILlAGC7bL+/c0R6RNZ yOz0RtNGDov/C+CCspHQbbGvO+w0fYNr0Un/rq9Uxuwgksn+hh/tn0U7kHg1AxgnOS TVnUuOtsIYk0+0fUhQp1tQMtBoaiEXdLsGiDM6JlebA85lJkM31c5aDw+Rcmmp8KiA zt6WjBMa/HhYw== References: <20220211160645.GA448@lpieralisi> User-agent: mu4e 1.6.10; emacs 27.1 From: Baruch Siach To: Robert Marko Cc: Lorenzo Pieralisi , Andy Gross , Bjorn Andersson , Selvam Sathappan Periakaruppan , Kathiravan T , Bjorn Helgaas , Rob Herring , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel , Bryan O'Donoghue , linux-pci@vger.kernel.org, linux-arm-msm , Linux ARM , linux-tegra@vger.kernel.org Subject: Re: [PATCH v6 0/3] PCI: IPQ6018 platform support Date: Tue, 15 Mar 2022 15:20:54 +0200 In-reply-to: Message-ID: <874k3zbaxc.fsf@tarshish> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220315_063032_451252_571F37B7 X-CRM114-Status: GOOD ( 23.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Robert, On Tue, Mar 15 2022, Robert Marko wrote: > On Fri, Feb 11, 2022 at 5:06 PM Lorenzo Pieralisi > wrote: >> >> On Mon, Feb 07, 2022 at 04:51:23PM +0200, Baruch Siach wrote: >> > This series adds support for the single PCIe lane on IPQ6018 SoCs. The code is >> > ported from downstream Codeaurora v5.4 kernel. The main difference from >> > downstream code is the split of PCIe registers configuration from .init to >> > .post_init, since it requires phy_power_on(). >> > >> > Tested on IPQ6010 based hardware. [snip] >> > >> > Baruch Siach (2): >> > PCI: dwc: tegra: move GEN3_RELATED DBI register to common header >> > PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_* >> > >> > Selvam Sathappan Periakaruppan (1): >> > PCI: qcom: Add IPQ60xx support >> > >> > drivers/pci/controller/dwc/pcie-designware.h | 7 + >> > drivers/pci/controller/dwc/pcie-qcom.c | 155 ++++++++++++++++++- >> > drivers/pci/controller/dwc/pcie-tegra194.c | 6 - >> > 3 files changed, 160 insertions(+), 8 deletions(-) >> >> Bjorn, Andy, >> >> Can you ACK please if this series is ready to be merged ? > > This would also help the IPQ8074 which has the same controller for the > Gen3 port. > > I have been using this for OpenWrt for a while and it works. Thanks for your test report. It would be nice to have a formal Tested-by for the pcie-qcom.c patch. It might help to push the patch forward. Can you also share the device-tree part? I'll add it to this series in case it needs a respin. Thanks, baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il - _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel