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Thu, 27 Jan 2022 11:08:18 +0000 Date: Thu, 27 Jan 2022 11:08:17 +0000 Message-ID: <874k5p77xa.wl-maz@kernel.org> From: Marc Zyngier To: Alexandru Elisei Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Andre Przywara , Christoffer Dall , Jintack Lim , Haibo Xu , Ganapatrao Kulkarni , James Morse , Suzuki K Poulose , kernel-team@android.com Subject: Re: [PATCH v5 14/69] KVM: arm64: nv: Support virtual EL2 exceptions In-Reply-To: References: <20211129200150.351436-1-maz@kernel.org> <20211129200150.351436-15-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: alexandru.elisei@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, andre.przywara@arm.com, christoffer.dall@arm.com, jintack@cs.columbia.edu, haibo.xu@linaro.org, gankulkarni@os.amperecomputing.com, james.morse@arm.com, suzuki.poulose@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_030823_599629_9C279272 X-CRM114-Status: GOOD ( 23.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 20 Jan 2022 13:58:02 +0000, Alexandru Elisei wrote: > > Hi Marc, > > On Mon, Nov 29, 2021 at 08:00:55PM +0000, Marc Zyngier wrote: > > +void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu) > > +{ > > + u64 spsr, elr, mode; > > + bool direct_eret; > > + > > + /* > > + * Going through the whole put/load motions is a waste of time > > + * if this is a VHE guest hypervisor returning to its own > > + * userspace, or the hypervisor performing a local exception > > + * return. No need to save/restore registers, no need to > > + * switch S2 MMU. Just do the canonical ERET. > > + */ > > + spsr = vcpu_read_sys_reg(vcpu, SPSR_EL2); > > + mode = spsr & (PSR_MODE_MASK | PSR_MODE32_BIT); > > + > > + direct_eret = (mode == PSR_MODE_EL0t && > > + vcpu_el2_e2h_is_set(vcpu) && > > + vcpu_el2_tge_is_set(vcpu)); > > + direct_eret |= (mode == PSR_MODE_EL2h || mode == PSR_MODE_EL2t); > > + > > + if (direct_eret) { > > + *vcpu_pc(vcpu) = vcpu_read_sys_reg(vcpu, ELR_EL2); > > + *vcpu_cpsr(vcpu) = spsr; > > + trace_kvm_nested_eret(vcpu, *vcpu_pc(vcpu), spsr); > > + return; > > + } > > + > > + preempt_disable(); > > + kvm_arch_vcpu_put(vcpu); > > + > > + elr = __vcpu_sys_reg(vcpu, ELR_EL2); > > + > > + trace_kvm_nested_eret(vcpu, elr, spsr); > > + > > + /* > > + * Note that the current exception level is always the virtual EL2, > > + * since we set HCR_EL2.NV bit only when entering the virtual EL2. > > + */ > > + *vcpu_pc(vcpu) = elr; > > + *vcpu_cpsr(vcpu) = spsr; > > + > > + kvm_arch_vcpu_load(vcpu, smp_processor_id()); > > + preempt_enable(); > > According to ARM DDI 0487G.a, page D13-3289, ERET'ing to EL1 when > HCR_EL2.TGE is set is an illegal exception return. I don't see this > case treated here. Yes, good call. I've now added handling for both the return to EL1 with TGE set as well as return to a 32bit mode. The return to EL3 case will directly be handled by the HW, and the return from AArch32 to AArch64 cannot happen by construction. Thanks for spotting it. M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel