From: Thomas Gleixner <tglx@kernel.org>
To: Pranjal Shrivastava <praan@google.com>, iommu@lists.linux.dev
Cc: Will Deacon <will@kernel.org>, Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
Mostafa Saleh <smostafa@google.com>,
Nicolin Chen <nicolinc@nvidia.com>,
Daniel Mentz <danielmentz@google.com>,
Ashish Mhetre <amhetre@nvidia.com>,
linux-arm-kernel@lists.infradead.org,
Radu Rendec <radu@rendec.net>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
rafael@kernel.org, Danilo Krummrich <dakr@kernel.org>,
driver-core@lists.linux.dev,
Pranjal Shrivastava <praan@google.com>,
sashiko-bot@kernel.org
Subject: Re: [PATCH v11 07/16] genirq/msi: Cache MSI message in irq_chip_write_msi_msg()
Date: Wed, 14 Oct 2026 23:52:41 +0200 [thread overview]
Message-ID: <875wz4eyqe.ffs@fw13> (raw)
In-Reply-To: <20260929034510.2023173-8-praan@google.com>
On Tue, Sep 29 2026 at 03:45, Pranjal Shrivastava wrote:
> Currently, PCI MSI caches the composed MSI message into the MSI
> descriptor inside __pci_write_msi_msg(), whereas platform MSI and other
> device MSI domains do not cache the message in the core, forcing
> individual drivers to manually copy the message into desc->msg if they
> need to restore it across power transitions.
>
> Cache desc->msg in irq_chip_write_msi_msg() before invoking the chip
> callback so all hierarchical MSI domains automatically record the
> latest message. Document why the redundant assignment in
> __pci_write_msi_msg() must remain for direct callers outside the
> irq_chip hierarchy.
>
> Suggested-by: Thomas Gleixner <tglx@kernel.org>
> Signed-off-by: Pranjal Shrivastava <praan@google.com>
> ---
> drivers/pci/msi/msi.c | 6 ++++++
> kernel/irq/msi.c | 9 +++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c
> index 80a9db417dc8..f7bedc31d486 100644
> --- a/drivers/pci/msi/msi.c
> +++ b/drivers/pci/msi/msi.c
> @@ -257,6 +257,12 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> pci_write_msg_msi(dev, entry, msg);
> }
>
> + /*
> + * Although irq_chip_write_msi_msg() already caches the message,
> + * keep the assignment here for callers that invoke
> + * __pci_write_msi_msg() or pci_write_msi_msg() directly outside
> + * the irq_chip hierarchy.
> + */
> entry->msg = *msg;
>
> if (entry->write_msi_msg)
> diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
> index fb5f372215bf..df460a574d80 100644
> --- a/kernel/irq/msi.c
> +++ b/kernel/irq/msi.c
> @@ -634,6 +634,15 @@ static unsigned int msi_domain_get_hwsize(struct device *dev, unsigned int domid
> static inline void irq_chip_write_msi_msg(struct irq_data *data,
> struct msi_msg *msg)
> {
> + struct msi_desc *desc = irq_data_get_msi_desc(data);
> +
> + /*
> + * PCI Multi-MSI shares a single descriptor across all vectors and
> + * the device stores only the base message. Cache the message of the
> + * first interrupt only, so that sub-vectors cannot overwrite it.
> + */
> + if (desc->irq == data->irq)
> + desc->msg = *msg;
> data->chip->irq_write_msi_msg(data, msg);
> }
Sashiko reported correctly:
> [Severity: Critical]
> Does this code cause a NULL pointer dereference for domains without an
> msi_desc object?
So this needs to be:
if (desc && desc->irq == data->irq)
desc->msg = *msg;
Did not think about that, but that also means that this patch was not
tested on any recent (less than 10 years old) Intel x86 platform or a
x86 VM exposing HPET...
Thanks,
tglx
next prev parent reply other threads:[~2026-10-14 21:52 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 3:44 [PATCH v11 00/16] iommu/arm-smmu-v3: Implement Runtime/System Sleep ops Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 01/16] iommu/arm-smmu-v3: Refactor arm_smmu_setup_irqs Pranjal Shrivastava
2026-10-07 14:06 ` Will Deacon
2026-09-29 3:44 ` [PATCH v11 02/16] iommu/arm-smmu-v3: Add Q_POS() macro Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 03/16] iommu/arm-smmu-v3: Add arm_smmu_drain_queue() helper Pranjal Shrivastava
2026-09-30 18:24 ` Nicolin Chen
2026-09-30 20:17 ` Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 04/16] iommu/tegra241-cmdqv: Add a helper to drain VCMDQs Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 05/16] iommu/arm-smmu-v3: Add a helper to drain cmd queues Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 06/16] iommu/tegra241-cmdqv: Restore PROD and CONS after resume Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 07/16] genirq/msi: Cache MSI message in irq_chip_write_msi_msg() Pranjal Shrivastava
2026-10-14 21:52 ` Thomas Gleixner [this message]
2026-09-29 3:45 ` [PATCH v11 08/16] genirq/msi: Provide msi_device_domain_restore_msi_msgs() Pranjal Shrivastava
2026-10-14 21:58 ` Thomas Gleixner
2026-09-29 3:45 ` [PATCH v11 09/16] iommu/arm-smmu-v3: Restore MSI config on resume Pranjal Shrivastava
2026-10-07 14:07 ` Will Deacon
2026-09-29 3:45 ` [PATCH v11 10/16] iommu/arm-smmu-v3: Factor out arm_smmu_handle_gerror() Pranjal Shrivastava
2026-09-30 18:34 ` Nicolin Chen
2026-09-30 20:00 ` Pranjal Shrivastava
2026-09-30 20:12 ` Nicolin Chen
2026-09-30 20:03 ` Pranjal Shrivastava
2026-10-07 14:07 ` Will Deacon
2026-09-29 3:45 ` [PATCH v11 11/16] iommu/arm-smmu-v3: Add CMDQ_PROD_STOP_FLAG to gate CMDQ submissions Pranjal Shrivastava
2026-09-30 20:33 ` Nicolin Chen
2026-10-01 5:40 ` Pranjal Shrivastava
2026-10-01 18:03 ` Nicolin Chen
2026-10-02 16:47 ` Jason Gunthorpe
2026-10-02 21:11 ` Pranjal Shrivastava
2026-10-06 17:26 ` Nicolin Chen
2026-10-07 14:08 ` Will Deacon
2026-10-13 11:35 ` Robin Murphy
2026-09-29 3:45 ` [PATCH v11 12/16] iommu/tegra241-cmdqv: Add a helper to quiesce VCMDQs Pranjal Shrivastava
2026-09-30 19:02 ` Nicolin Chen
2026-09-30 19:57 ` Pranjal Shrivastava
2026-09-30 20:03 ` Nicolin Chen
2026-09-29 3:45 ` [PATCH v11 13/16] iommu/arm-smmu-v3: Implement pm_runtime & system sleep ops Pranjal Shrivastava
2026-10-01 20:22 ` Nicolin Chen
2026-10-07 14:08 ` Will Deacon
2026-09-29 3:45 ` [PATCH v11 14/16] iommu/arm-smmu-v3: Enable pm_runtime and setup devlinks Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 15/16] iommu/arm-smmu-v3: Invoke pm_runtime before hw access Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 16/16] iommu/arm-smmu-v3: Add KUnit unit tests for Runtime PM Pranjal Shrivastava
2026-10-01 19:12 ` Nicolin Chen
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