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Wed, 01 Apr 2026 18:34:23 +0000 Date: Wed, 01 Apr 2026 19:34:23 +0100 Message-ID: <875x6acyxc.wl-maz@kernel.org> From: Marc Zyngier To: Sebastian Ene Cc: catalin.marinas@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, android-kvm@google.com, joey.gouly@arm.com, korneld@google.com, mrigendra.chaubey@gmail.com, oupton@kernel.org, perlarsen@google.com, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com Subject: Re: [PATCH] KVM: arm64: Pass a 64bit function-id in the SMC handlers In-Reply-To: <877bqqcz77.wl-maz@kernel.org> References: <20260401123201.389906-1-sebastianene@google.com> <86341e4to0.wl-maz@kernel.org> <877bqqcz77.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sebastianene@google.com, catalin.marinas@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, android-kvm@google.com, joey.gouly@arm.com, korneld@google.com, mrigendra.chaubey@gmail.com, oupton@kernel.org, perlarsen@google.com, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 01 Apr 2026 19:28:28 +0100, Marc Zyngier wrote: > > On Wed, 01 Apr 2026 18:21:58 +0100, > Sebastian Ene wrote: > > > > On Wed, Apr 01, 2026 at 03:55:11PM +0100, Marc Zyngier wrote: > > > On Wed, 01 Apr 2026 13:32:01 +0100, > > > Sebastian Ene wrote: > > > > > > > > Make the SMC handlers accept a 64bit value for the function-id to keep > > > > it uniform with the rest of the code and prevent a u64 -> u32 -> u64 > > > > conversion as it currently happens when we handle PSCI. > > > > > > That seems overly creative. The spec says (2.5, from ARM DEN 0028 1.6 > > > G): > > > > I'm not plannig to be *overly creative*. Thanks for pointing out the ARM > > spec. > > > > > > > > "The Function Identifier is passed on W0 on every SMC and HVC > > > call. Its 32-bit integer value indicates which function is being > > > requested by the caller. It is always passed as the first argument to > > > every SMC or HVC call in R0 or W0." > > > > > > which indicates that it is *always* a 32bit value. > > > > > > So if you have a 64bit value somewhere, *that* should be fixed, not > > > propagated arbitrarily. > > > > If you have a non SMCCC call that happen to have the first 32-bits of > > the function-id matching either PSCI or FF-A you will end up handling > > them instead of forwarding it to Trustzone because func_id is declared as: > > > > DECLARE_REG(u64, func_id, host_ctxt, 0); > > Again, the correct approach to prevent the propagation of something > that is known to be wrong. Something like this: > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > index 007fc993f2319..dae993a1d081b 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > @@ -694,6 +694,11 @@ static void handle_host_smc(struct kvm_cpu_context *host_ctxt) > DECLARE_REG(u64, func_id, host_ctxt, 0); > bool handled; > > + if (upper_32_bits(func_id)) { > + cpu_reg(host_ctxt, 0) = SMCCC_RET_NOT_SUPPORTED; > + kvm_skip_host_instr(); Plus the obviously missing: + return; > + } > + M. -- Jazz isn't dead. It just smells funny.