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From: Cornelia Huck <cohuck@redhat.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
	kvmarm@lists.linux.dev, maz@kernel.org, oliver.upton@linux.dev
Cc: catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com,
	eric.auger@redhat.com, yuzenghui@huawei.com,
	wangzhou1@hisilicon.com, jiangkunkun@huawei.com,
	jonathan.cameron@huawei.com, anthony.jebson@huawei.com,
	linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com
Subject: Re: [PATCH v3 3/3] arm64: paravirt: Enable errata based on implementation CPUs
Date: Mon, 09 Dec 2024 13:49:16 +0100	[thread overview]
Message-ID: <875xnt10oj.fsf@redhat.com> (raw)
In-Reply-To: <20241209115311.40496-4-shameerali.kolothum.thodi@huawei.com>

On Mon, Dec 09 2024, Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> wrote:

> Retrieve any migration target implementation CPUs using the hypercall
> and enable associated errata.
>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> ---
> Note:
>
> One thing I am not sure here is how to handle the hypercall error.
> Do we need to fail the Guest boot or just carry on without any
> target implementation CPU support? At the moment it just carries on.
>
> Thanks,
> Shameer
> ---
>  arch/arm64/include/asm/cputype.h  | 25 +++++++++++++++++++++++--
>  arch/arm64/include/asm/paravirt.h |  3 +++
>  arch/arm64/kernel/cpu_errata.c    | 20 +++++++++++++++++---
>  arch/arm64/kernel/cpufeature.c    |  2 ++
>  arch/arm64/kernel/image-vars.h    |  2 ++
>  arch/arm64/kernel/paravirt.c      | 31 +++++++++++++++++++++++++++++++
>  6 files changed, 78 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index dcf0e1ce892d..9e466f3ae9c6 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -265,6 +265,16 @@ struct midr_range {
>  #define MIDR_REV(m, v, r) MIDR_RANGE(m, v, r, v, r)
>  #define MIDR_ALL_VERSIONS(m) MIDR_RANGE(m, 0, 0, 0xf, 0xf)
>  
> +#define MAX_TARGET_IMPL_CPUS 64
> +
> +struct target_impl_cpu {
> +	u32 midr;
> +	u32 revidr;
> +};

Doesn't this need to be u64 for both (even if the upper bits for
MIDR_EL1 are reserved?)



  reply	other threads:[~2024-12-09 13:11 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-09 11:53 [PATCH v3 0/3] KVM: arm64: Errata management for VM Live migration Shameer Kolothum
2024-12-09 11:53 ` [PATCH v3 1/3] arm64: Modify _midr_range() functions to read MIDR/REVIDR internally Shameer Kolothum
2024-12-13 16:31   ` Sebastian Ott
2024-12-09 11:53 ` [PATCH v3 2/3] KVM: arm64: Introduce hypercall support for retrieving target implementations Shameer Kolothum
2024-12-13 16:31   ` Sebastian Ott
2024-12-09 11:53 ` [PATCH v3 3/3] arm64: paravirt: Enable errata based on implementation CPUs Shameer Kolothum
2024-12-09 12:49   ` Cornelia Huck [this message]
2024-12-09 13:49     ` Shameerali Kolothum Thodi
2024-12-09 15:45       ` Marc Zyngier
2024-12-13 16:45   ` Sebastian Ott

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