From: Thomas Gleixner <tglx@linutronix.de>
To: Sunil V L <sunilvl@ventanamicro.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
acpica-devel@lists.linux.dev
Cc: "Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>,
"Sunil V L" <sunilvl@ventanamicro.com>
Subject: Re: [PATCH v6 00/17] RISC-V: ACPI: Add external interrupt controller support
Date: Tue, 25 Jun 2024 09:25:23 +0200 [thread overview]
Message-ID: <875xtx7acc.ffs@tglx> (raw)
In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com>
On Sat, Jun 01 2024 at 20:33, Sunil V L wrote:
> This series adds support for the below ECR approved by ASWG.
> 1) MADT - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing
>
> The series primarily enables irqchip drivers for RISC-V ACPI based
> platforms.
>
> The series can be broadly categorized like below.
>
> 1) PCI ACPI related functions are migrated from arm64 to common file so
> that we don't need to duplicate them for RISC-V.
>
> 2) Added support for re-ordering the probe of interrupt controllers when
> IRQCHIP_ACPI_DECLARE is used.
>
> 3) To ensure probe order between interrupt controllers and devices,
> implicit dependency is created similar to when _DEP is present.
>
> 4) ACPI support added in RISC-V interrupt controller drivers.
So this needs eyeballs from the ACPI people and a strategy how to merge
it.
Thanks,
tglx
prev parent reply other threads:[~2024-06-25 7:25 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-01 15:03 [PATCH v6 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-06-01 15:03 ` [PATCH v6 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-06-01 15:03 ` [PATCH v6 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe Sunil V L
2024-06-01 15:03 ` [PATCH v6 03/17] ACPI: bus: Add acpi_riscv_init function Sunil V L
2024-06-01 15:03 ` [PATCH v6 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-06-01 15:03 ` [PATCH v6 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-06-01 15:04 ` [PATCH v6 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-06-01 15:04 ` [PATCH v6 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-06-01 15:04 ` [PATCH v6 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-06-01 15:04 ` [PATCH v6 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-06-01 15:04 ` [PATCH v6 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-06-06 22:07 ` Bjorn Helgaas
2024-07-10 13:55 ` Sunil V L
2024-06-01 15:04 ` [PATCH v6 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-06-06 22:32 ` Bjorn Helgaas
2024-07-10 10:45 ` Lorenzo Pieralisi
2024-07-10 13:42 ` Sunil V L
2024-06-01 15:04 ` [PATCH v6 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-06-01 15:04 ` [PATCH v6 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-06-01 15:04 ` [PATCH v6 14/17] irqchip/riscv-imsic-state: Create separate function for DT Sunil V L
2024-06-01 15:04 ` [PATCH v6 15/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-06-01 15:04 ` [PATCH v6 16/17] irqchip/riscv-aplic: " Sunil V L
2024-06-01 15:04 ` [PATCH v6 17/17] irqchip/sifive-plic: " Sunil V L
2024-06-25 7:25 ` Thomas Gleixner [this message]
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