Re: [PATCH v5] arm64: errata: Fix exec handling in erratum 1418040 workaround

From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: D Scott Phillips <scott@os.amperecomputing.com>,
	linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	Darren Hart <darren@os.amperecomputing.com>,
	patches@amperecomputing.com
Subject: Re: [PATCH v5] arm64: errata: Fix exec handling in erratum 1418040 workaround
Date: Wed, 22 Dec 2021 12:44:20 +0000	[thread overview]
Message-ID: <875yrg24ij.wl-maz@kernel.org> (raw)
In-Reply-To: <YcMF8bHwsw0v6RpG@arm.com>

On Wed, 22 Dec 2021 11:03:13 +0000,
Catalin Marinas <catalin.marinas@arm.com> wrote:
> 
> On Tue, Dec 21, 2021 at 12:10:08PM -0800, D Scott Phillips wrote:
> > Catalin Marinas <catalin.marinas@arm.com> writes:
> > > On Mon, Dec 20, 2021 at 03:41:14PM -0800, D Scott Phillips wrote:
> > >> The erratum 1418040 workaround enables CNTVCT_EL1 access trapping in EL0
> > >> when executing compat threads. The workaround is applied when switching
> > >> between tasks, but the need for the workaround could also change at an
> > >> exec(), when a non-compat task execs a compat binary or vice versa. Apply
> > >> the workaround in arch_setup_new_exec().
> > >> 
> > >> This leaves a small window of time between SET_PERSONALITY and
> > >> arch_setup_new_exec where preemption could occur and confuse the old
> > >> workaround logic that compares TIF_32BIT between prev and next. Instead, we
> > >> can just read cntkctl to make sure it's in the state that the next task
> > >> needs. I measured cntkctl read time to be about the same as a mov from a
> > >> general-purpose register on N1. Update the workaround logic to examine the
> > >> current value of cntkctl instead of the previous task's compat state.
> > >
> > > The patch looks fine to me but I was wondering what the cost of writing
> > > CNTKCTL_EL1 is, compared to a read. If it turns out to be negligible, we
> > > can simplify this patch further ;).
> > 
> > I measured it at something like 20-30x the time of a read, though that
> > was in a tight loop of writing, so maybe the cost could be hidden some
> > by out-of-order execution.

I'm not overly surprised. Writing to this register is likely to
require some level of synchronisation pretty deep inside the core as
event stream changes would take effect immediately.

> > Are you thinking of moving the erratum workaround back to the exit
> > to user path?
> 
> No, just wondering whether we can avoid the read/check/write with
> preemption disabled. Thread switches happen less often than the return
> to user.
> 
> I'll probably take your current patch as a fix of Marc's commit. Waiting
> a bit to see if Marc has any further comments.

No, I think this is pretty much it. Feel free to apply it with my

Reviewed-by: Marc Zyngier <maz@kernel.org>

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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