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Wed, 02 Jun 2021 10:23:05 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1loO1d-003HJt-4R for linux-arm-kernel@lists.infradead.org; Wed, 02 Jun 2021 10:23:02 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D42BF613B4; Wed, 2 Jun 2021 10:23:00 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1loO1a-0050D2-QG; Wed, 02 Jun 2021 11:22:58 +0100 Date: Wed, 02 Jun 2021 11:22:56 +0100 Message-ID: <875yyw1s73.wl-maz@kernel.org> From: Marc Zyngier To: Yanan Wang Cc: Will Deacon , "Quentin\ Perret" , Alexandru Elisei , , , , , Catalin Marinas , James Morse , Julien Thierry , "Suzuki K Poulose" , Gavin Shan , , , Subject: Re: [PATCH v5 4/6] KVM: arm64: Provide invalidate_icache_range at non-VHE EL2 In-Reply-To: <20210415115032.35760-5-wangyanan55@huawei.com> References: <20210415115032.35760-1-wangyanan55@huawei.com> <20210415115032.35760-5-wangyanan55@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: wangyanan55@huawei.com, will@kernel.org, qperret@google.com, alexandru.elisei@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, gshan@redhat.com, wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210602_032301_241424_0C7C875C X-CRM114-Status: GOOD ( 24.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 15 Apr 2021 12:50:30 +0100, Yanan Wang wrote: > > We want to move I-cache maintenance for the guest to the stage-2 > page table code for performance improvement. Before it can work, > we should first make function invalidate_icache_range available > to non-VHE EL2 to avoid compiling or program running error, as > pgtable.c is now linked into the non-VHE EL2 code for pKVM mode. > > In this patch, we only introduce symbol of invalidate_icache_range > with no real functionality in nvhe/cache.S, because there haven't > been situations found currently where I-cache maintenance is also > needed in non-VHE EL2 for pKVM mode. > > Signed-off-by: Yanan Wang > --- > arch/arm64/kvm/hyp/nvhe/cache.S | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/kvm/hyp/nvhe/cache.S b/arch/arm64/kvm/hyp/nvhe/cache.S > index 36cef6915428..a125ec9aeed2 100644 > --- a/arch/arm64/kvm/hyp/nvhe/cache.S > +++ b/arch/arm64/kvm/hyp/nvhe/cache.S > @@ -11,3 +11,14 @@ SYM_FUNC_START_PI(__flush_dcache_area) > dcache_by_line_op civac, sy, x0, x1, x2, x3 > ret > SYM_FUNC_END_PI(__flush_dcache_area) > + > +/* > + * invalidate_icache_range(start,end) > + * > + * Ensure that the I cache is invalid within specified region. > + * > + * - start - virtual start address of region > + * - end - virtual end address of region > + */ > +SYM_FUNC_START(invalidate_icache_range) > +SYM_FUNC_END(invalidate_icache_range) This is a good indication that something is really wrong. If you were to provide cache management callbacks as part of the mm_ops themselves (or a similar abstraction), you wouldn't have to do these things. M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel