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Tue, 16 Mar 2021 15:00:57 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lMBBh-000zrL-Ft for linux-arm-kernel@lists.infradead.org; Tue, 16 Mar 2021 15:00:51 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E512B65079; Tue, 16 Mar 2021 15:00:47 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lMBBd-001zFo-VW; Tue, 16 Mar 2021 15:00:46 +0000 Date: Tue, 16 Mar 2021 15:00:45 +0000 Message-ID: <875z1rf8iq.wl-maz@kernel.org> From: Marc Zyngier To: Andrew Scull Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, Will Deacon , Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , broonie@kernel.org, kernel-team@android.com Subject: Re: [PATCH 08/10] KVM: arm64: Add a nVHE-specific SVE VQ reset hypercall In-Reply-To: References: <20210316101312.102925-1-maz@kernel.org> <20210316101312.102925-9-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: ascull@google.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, broonie@kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210316_150049_718436_1D9F103F X-CRM114-Status: GOOD ( 24.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 16 Mar 2021 14:24:38 +0000, Andrew Scull wrote: > > On Tue, Mar 16, 2021 at 10:13:10AM +0000, Marc Zyngier wrote: > > ZCR_EL2 controls the upper bound for ZCR_EL1, and is set to > > a potentially lower limit when the guest uses SVE. > > > > In order to restore the SVE state on the EL1 host, we must first > > reset ZCR_EL2 to its original value. > > > > Provide a hypervall that perform this reset. > > Is there a good reason to have an explicit hypercall vs trapping the > host access to SVE and restoring in that event? Trapping ZCR_EL2 isn't possible, as it would UNDEF at EL1. Trapping ZCR_EL1 accesses is possible though, but it'd mean leaving the SVE traps enabled on guest exit, something we currently don't do. > It's quite easy to do trap handling at EL2 now and it could let things > be even lazier, if that's any benefit in this case. We don't really have a good infrastructure for dealing with individual sysregs (pKVM will eventually change that, but we're not there yet, and it isn't clear how that'd apply to non-protected), so we'd have to deal with the whole SVE EC. What we could do is: - set CPTR_EL2.TZ set on guest exit - on SVE trap, reset ZCR_EL2, clear CPTR_EL2.TZ, reexecute the faulting instruction. I can have a look at how badly it looks. > Trapping seems to have had a bad rep in other conversations but I'm not > sure the same reasoning applies to this as well, or not. HVC and traps have the same basic cost. I seriously doubt you can measure the difference on any real CPU. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel