From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7FCCC3DA7E for ; Mon, 29 Jul 2024 13:36:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Message-ID:Date:References:In-Reply-To:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=yu5fuUTyWcm2/mQPEh01yHeJy16Hv5142s09pHgbzDk=; b=SYINX/KAwZ3+KKpHNoByIuJ7Gr BcPKf8oNcNfSN8lXewVjQ6vZ3ipgo72LdU6zBOoGis65JQXiCX9vm3+s05JYpTqz5iHTkkWgDk/11 bg9BttCAE6jWgMmSo33EbhnQZafVKf9r871qbWgIA+39Kq5MO1+Q2kTn9X5SzM2km4RMjjuKXILDK bK3nugDSD8/Nq5DtLdjdRLNiTlibYQsqrT8Z6dAnZ0FhhoN3W257KNGTvdJaokOYJsDCS5l1zhfYX viFKr31lqX9zJBC2yBrC1GF4OoqmW5LkumrRnlbURnuLCfCXYbicgDHxrdtQ7cBoHPliJfM8eICji so8YD/3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYQYM-0000000BRzN-07xy; Mon, 29 Jul 2024 13:36:42 +0000 Received: from galois.linutronix.de ([193.142.43.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYQXs-0000000BRrD-2l1V for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2024 13:36:16 +0000 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1722260169; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yu5fuUTyWcm2/mQPEh01yHeJy16Hv5142s09pHgbzDk=; b=YC7EcPXqE21Mj6WmilqQRrYFsp1nKUMfZd8DLENtwzstDTZQS0qEajfVfOeMNZMStHjhbW vXj+1nb7DbUtHMuU/uFbXsfC3I+sJPN5RsQjRTobnVaAz8DfeM4lIhGWCMEQhwow4jXrFx h4m8akl0EKYCt4LdSdOBnMtuL3vrXPKHIxmc8mF9y6RsmVc46LjuYMtm6Yqjf9lsjKDK78 q3qH8cZrahBXj8N2lOMMYVIR7Q8Fa5K+4G396KLaBEv+ue6OkzSpSckQEs8eYreVr0wHYA OvgJ9aLsmdOA44DVHrVpcIbYNT6/b4YGn2TRRLQMntgSomUVFQs2wnWnF+qvqA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1722260169; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yu5fuUTyWcm2/mQPEh01yHeJy16Hv5142s09pHgbzDk=; b=P2SF1EkOD+95M7Y6VXB1cZES5hA4fxAJrSQ5uMmzuj2leaG61Gw+1sj49OgtAG2EKUMtiL 3hv74JfyVHDICkDQ== To: Marek =?utf-8?Q?Beh=C3=BAn?= Cc: Marek =?utf-8?Q?Beh=C3=BAn?= , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , Ilpo =?utf-8?Q?J=C3=A4rvinen?= Subject: Re: [PATCH 10/13] irqchip/armada-370-xp: Fix reenabling last per-CPU interrupt In-Reply-To: References: <20240715105156.18388-1-kabel@kernel.org> <20240715105156.18388-11-kabel@kernel.org> <87sevtrxxp.ffs@tglx> Date: Mon, 29 Jul 2024 15:36:09 +0200 Message-ID: <877cd48gmu.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_063612_864097_6B376AAC X-CRM114-Status: GOOD ( 21.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 29 2024 at 15:28, Marek Beh=C3=BAn wrote: > On Sun, Jul 28, 2024 at 11:47:30PM +0200, Thomas Gleixner wrote: >> On Mon, Jul 15 2024 at 12:51, Marek Beh=C3=BAn wrote: >> > The number of per-CPU interrupts is 29 (0 to 28). This is described by >> > the constant MPIC_MAX_PER_CPU_IRQS, set to 28 (the maximum per-CPU >> > interrupt). >> > >> > Commit 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU >> > interrupts at resume time") used the constant incorrectly in the >> > for-loop, it used the operator < instead of <=3D, causing it to iterate >> > only the first 28 interrupts (0 to 27), ignoring the last, 28th, >> > per-CPU interrupt. >> > >> > To avoid this kind of confusions, fix this issue by renaming the const= ant >> > to MPIC_PER_CPU_IRQS_NR and set it to 29, the number of per-CPU IRQs. >> > Update its use in mpic_is_percpu_irq() accordingly. >> > >> > Fixes: 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU interru= pts at resume time") >> > Signed-off-by: Marek Beh=C3=BAn >>=20 >> Please don't hide fixes in the middle of a refactoring series. Split >> them out and make sure that they can be applied w/o prerequisites so >> they can be easily backported. > > Hi Thomas, > > but now that you applied my previous refactors to irq/core, even if I > rebase the patch on top of those, it won't apply to stable kernels. > > I can either: > - ignore this issue and post the patch alone as a fixes patch > - rebase on top of v6.11-rc1 and send you updated version of patches > you already applied to irq/core > - drop the Fixes tag (the 29th per-CPU interrupt is not used in any > real device-tree) Drop the fixes tag then.