From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9ED69C433EF for ; Tue, 10 May 2022 18:39:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rEpEeCl5A41hHLrhWT+q3NrEr2GrRX0gaN+1xo7Kmp8=; b=fP5ycJ3yRLJzzc g2SYOXDZ54avN6mUDmUixauIiM1SsballOXXvI/NejQBT+WeMytUAtYhKLWsSRujm600oKB+fUF9z RtVwPrAOiv9PpAFprMvh7afIqYqKmWmXZm+7LxCP7n7UnIpHfepeh5zVrffybv/l/b33PHZFyx71l N9+fJOTUkLA0Ryxi1xxQYmX36kSEV1ey+uU6dpN9tKdWxrnIqo+6Y3VP9UXiVtBQNzxBZYbWH9VDu QcjrFJB3Jc/08AE5HX41oMtqiHeB0akK80AQzibKCYUti26mFXuHpuRszKgyZcswa40S83Kkc6BBU OHvuWkyrITU6UBhzWpcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noUkr-003fiW-SK; Tue, 10 May 2022 18:38:42 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noUkn-003fgo-Dz for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 18:38:39 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 11066B81F68; Tue, 10 May 2022 18:38:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9C0BC385C2; Tue, 10 May 2022 18:38:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1652207914; bh=vg/AQo4Tb6myBSReu7aIrGsdQxy3WBI+M6zOfl8oVfg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=e6hEDQ93rEm5p6s157edQCLKPbV4ht/O0WqWtVzty+VBJMoi94JXBad4Bl4H3h/BO yhDuQeYw+EJqkGFFXZSJD9Sv1/T/fRKNDagi5Kbl2g0lCX+YYTeEdHs5sTDLRUSTM6 loeMGMrLdfkRVrLX7ASbeZzqO5Mdx6shGxps9zCH5HZm6bxbsxO5smDepR/kRzUG/F So+3RiPv4b6pMYKrFi4mMcn33MLHkeqxgpkYnQxa5EI4SU7jGGFkBuAgnEJQMce/Aa WJZfF7PUmfUyjmvdemMKvkVntlsoGCaP0SZPlpVS91vV/P6fqpbYkzop5o8GcaUJQX aBb65KjEWz0+g== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1noUki-00AMsa-89; Tue, 10 May 2022 19:38:32 +0100 Date: Tue, 10 May 2022 19:38:32 +0100 Message-ID: <877d6t6xnb.wl-maz@kernel.org> From: Marc Zyngier To: Antonio Borneo Cc: Thomas Gleixner , Maxime Coquelin , Alexandre Torgue , , , , Ludovic Barre , Loic Pallardy , Pascal Paillet Subject: Re: [PATCH 3/7] irqchip/stm32-exti: remove EMR register access for stm32mp15 In-Reply-To: <20220510164123.557921-3-antonio.borneo@foss.st.com> References: <20220510164123.557921-1-antonio.borneo@foss.st.com> <20220510164123.557921-3-antonio.borneo@foss.st.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: antonio.borneo@foss.st.com, tglx@linutronix.de, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, ludovic.barre@foss.st.com, loic.pallardy@foss.st.com, p.paillet@foss.st.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220510_113837_789465_BF871E35 X-CRM114-Status: GOOD ( 22.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 10 May 2022 17:41:19 +0100, Antonio Borneo wrote: > > From: Alexandre Torgue > > C1EMRx registers are not accessible on STM32MP15x. And what happens if they are accessed? What are these registers for? (notice a pattern here?) M. > > Signed-off-by: Alexandre Torgue > Signed-off-by: Antonio Borneo > --- > drivers/irqchip/irq-stm32-exti.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c > index 1145f064faa8..c8003f4f0457 100644 > --- a/drivers/irqchip/irq-stm32-exti.c > +++ b/drivers/irqchip/irq-stm32-exti.c > @@ -132,7 +132,6 @@ static const struct stm32_exti_drv_data stm32h7xx_drv_data = { > > static const struct stm32_exti_bank stm32mp1_exti_b1 = { > .imr_ofst = 0x80, > - .emr_ofst = 0x84, > .rtsr_ofst = 0x00, > .ftsr_ofst = 0x04, > .swier_ofst = 0x08, > @@ -142,7 +141,6 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = { > > static const struct stm32_exti_bank stm32mp1_exti_b2 = { > .imr_ofst = 0x90, > - .emr_ofst = 0x94, > .rtsr_ofst = 0x20, > .ftsr_ofst = 0x24, > .swier_ofst = 0x28, > @@ -152,7 +150,6 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = { > > static const struct stm32_exti_bank stm32mp1_exti_b3 = { > .imr_ofst = 0xA0, > - .emr_ofst = 0xA4, > .rtsr_ofst = 0x40, > .ftsr_ofst = 0x44, > .swier_ofst = 0x48, > @@ -792,7 +789,8 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, > * clear registers to avoid residue > */ > writel_relaxed(0, base + stm32_bank->imr_ofst); > - writel_relaxed(0, base + stm32_bank->emr_ofst); > + if (stm32_bank->emr_ofst) > + writel_relaxed(0, base + stm32_bank->emr_ofst); > > pr_info("%pOF: bank%d\n", node, bank_idx); > > -- > 2.36.0 > > -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel