From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1982FC04A6B for ; Fri, 10 May 2019 13:16:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DE9B321479 for ; Fri, 10 May 2019 13:16:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="GEZ/bWGg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DE9B321479 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SlzroW3hJFoOOav/srXzzR+hQOPnYn3K5f4HhSW3e38=; b=GEZ/bWGg+hMPtC asfSgpwNph6ecJ6qPzNnoZOhXY59JMThpy5hKbqMSczMbpU3ZXk6+GR+GpPqjxNUg+tC4/AqV8Imf KsFiFNu00KcAgUcADNLrgDg0EBRCg0s7ZlqRoB/A93vDbbw/xgRFjX+1THJW2XJkqvMZ4jK9edeZg LtVVTU75tYSR77XFnmBniDjMV3c1Q5RwXYs9/YlWiovigHxT9JQ5v6mJHa0VtDU+yafLR2071oywO wOFXxNlL2vMiykVob4lr7M+UtgcFKi89G2Yt9PBGJ/fyD+sql8kTctfQ/wKQ3OIZYZeLMp1gYnuzi er10LI7l7BgDu0g6weZg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hP5Nq-00067K-0W; Fri, 10 May 2019 13:16:18 +0000 Received: from relay1-d.mail.gandi.net ([217.70.183.193]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hP5Nm-00065m-AN for linux-arm-kernel@lists.infradead.org; Fri, 10 May 2019 13:16:16 +0000 X-Originating-IP: 109.213.220.252 Received: from localhost (alyon-652-1-77-252.w109-213.abo.wanadoo.fr [109.213.220.252]) (Authenticated sender: gregory.clement@bootlin.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id 67C50240017; Fri, 10 May 2019 13:15:59 +0000 (UTC) From: Gregory CLEMENT To: Alexandre Belloni , Vladimir Zapolskiy Subject: Re: [PATCH] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL In-Reply-To: <20190510130855.4263-1-alexandre.belloni@bootlin.com> References: <20190510130855.4263-1-alexandre.belloni@bootlin.com> Date: Fri, 10 May 2019 15:15:58 +0200 Message-ID: <877eay30xd.fsf@FE-laptop> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190510_061614_511026_2FE8BB87 X-CRM114-Status: GOOD ( 14.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sylvain Lemieux Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Alexandre, > This reverts commit c17e9377aa81664d94b4f2102559fcf2a01ec8e7. > > The lpc32xx clock driver is not able to actually change the PLL rate as > this would require reparenting ARM_CLK, DDRAM_CLK, PERIPH_CLK to SYSCLK, > then stop the PLL, update the register, restart the PLL and wait for the > PLL to lock and finally reparent ARM_CLK, DDRAM_CLK, PERIPH_CLK to HCLK > PLL. > > Currently, the HCLK driver simply updates the registers but this has no > real effect and all the clock rate calculation end up being wrong. This is > especially annoying for the peripheral (e.g. UARTs, I2C, SPI). > > Signed-off-by: Alexandre Belloni Tested-by: Gregory CLEMENT Gregory > --- > arch/arm/boot/dts/lpc32xx.dtsi | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi > index 20b38f4ade37..a49c97e5a38a 100644 > --- a/arch/arm/boot/dts/lpc32xx.dtsi > +++ b/arch/arm/boot/dts/lpc32xx.dtsi > @@ -323,9 +323,6 @@ > > clocks = <&xtal_32k>, <&xtal>; > clock-names = "xtal_32k", "xtal"; > - > - assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>; > - assigned-clock-rates = <208000000>; > }; > }; > > -- > 2.21.0 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel