* [PATCH 1/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13
2022-02-21 13:37 [PATCH 0/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp Alexandre Torgue
@ 2022-02-21 13:37 ` Alexandre Torgue
2022-02-21 13:37 ` [PATCH 2/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15 Alexandre Torgue
2022-02-21 16:16 ` [PATCH 0/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp Marc Zyngier
2 siblings, 0 replies; 4+ messages in thread
From: Alexandre Torgue @ 2022-02-21 13:37 UTC (permalink / raw)
To: arnd, robh+dt
Cc: linux-arm-kernel, devicetree, Alexandre Torgue, linux-stm32,
linux-kernel, Marek Vasut, jagan, Manivannan Sadhasivam,
Marcin Sloniewski, Ahmad Fatoum, Marc Zyngier
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP13 is a single core A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 262de4eeb4ed..1708c79b5254 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -92,10 +92,10 @@
timer {
compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&intc>;
always-on;
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
2022-02-21 13:37 [PATCH 0/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp Alexandre Torgue
2022-02-21 13:37 ` [PATCH 1/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13 Alexandre Torgue
@ 2022-02-21 13:37 ` Alexandre Torgue
2022-02-21 16:16 ` [PATCH 0/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp Marc Zyngier
2 siblings, 0 replies; 4+ messages in thread
From: Alexandre Torgue @ 2022-02-21 13:37 UTC (permalink / raw)
To: arnd, robh+dt
Cc: linux-arm-kernel, devicetree, Alexandre Torgue, linux-stm32,
linux-kernel, Marek Vasut, jagan, Manivannan Sadhasivam,
Marcin Sloniewski, Ahmad Fatoum, Marc Zyngier
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP151 is a single A7.
STM32MP153/157 is a dual A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 2171e7a97e92..f9aa9af31efd 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -45,10 +45,10 @@
timer {
compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&intc>;
};
diff --git a/arch/arm/boot/dts/stm32mp153.dtsi b/arch/arm/boot/dts/stm32mp153.dtsi
index 1c1889b194cf..486084e0b80b 100644
--- a/arch/arm/boot/dts/stm32mp153.dtsi
+++ b/arch/arm/boot/dts/stm32mp153.dtsi
@@ -22,6 +22,13 @@
interrupt-affinity = <&cpu0>, <&cpu1>;
};
+ timer {
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
soc {
m_can1: can@4400e000 {
compatible = "bosch,m_can";
--
2.17.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 0/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp
2022-02-21 13:37 [PATCH 0/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp Alexandre Torgue
2022-02-21 13:37 ` [PATCH 1/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13 Alexandre Torgue
2022-02-21 13:37 ` [PATCH 2/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15 Alexandre Torgue
@ 2022-02-21 16:16 ` Marc Zyngier
2 siblings, 0 replies; 4+ messages in thread
From: Marc Zyngier @ 2022-02-21 16:16 UTC (permalink / raw)
To: Alexandre Torgue
Cc: arnd, robh+dt, linux-arm-kernel, devicetree, linux-stm32,
linux-kernel, Marek Vasut, jagan, Manivannan Sadhasivam,
Marcin Sloniewski, Ahmad Fatoum
On Mon, 21 Feb 2022 13:37:48 +0000,
Alexandre Torgue <alexandre.torgue@foss.st.com> wrote:
>
> Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
>
> regards
> alex
>
> Alexandre Torgue (2):
> ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13
> ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
>
> arch/arm/boot/dts/stm32mp131.dtsi | 8 ++++----
> arch/arm/boot/dts/stm32mp151.dtsi | 8 ++++----
> arch/arm/boot/dts/stm32mp153.dtsi | 7 +++++++
> 3 files changed, 15 insertions(+), 8 deletions(-)
FWIW:
Acked-by: Marc Zyngier <maz@kernel.org>
M.
--
Without deviation from the norm, progress is not possible.
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^ permalink raw reply [flat|nested] 4+ messages in thread