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Mon, 25 Oct 2021 11:57:48 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1meybq-001Lxu-6y; Mon, 25 Oct 2021 12:57:46 +0100 Date: Mon, 25 Oct 2021 12:57:45 +0100 Message-ID: <878ryhb9l2.wl-maz@kernel.org> From: Marc Zyngier To: Valentin Schneider Cc: linux-kernel@vger.kernel.org, linux-rt-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Will Deacon , Mark Rutland , Thomas Gleixner , Sebastian Andrzej Siewior , Ard Biesheuvel Subject: Re: [PATCH 2/3] irqchip/gic-v3-its: Postpone LPI pending table freeing and memreserve In-Reply-To: <87a6iyju92.mognet@arm.com> References: <20211022103307.1711619-1-valentin.schneider@arm.com> <20211022103307.1711619-3-valentin.schneider@arm.com> <87pmrwt6l5.wl-maz@kernel.org> <87a6iyju92.mognet@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: valentin.schneider@arm.com, linux-kernel@vger.kernel.org, linux-rt-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, will@kernel.org, mark.rutland@arm.com, tglx@linutronix.de, bigeasy@linutronix.de, ardb@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211025_045748_904574_7DDD6197 X-CRM114-Status: GOOD ( 18.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, 24 Oct 2021 16:51:53 +0100, Valentin Schneider wrote: > > What we could do instead is only have a PREALLOCATED flag (or RESERVED; in > any case just one rather than two) set in its_cpu_init_lpis(), and ensure > each CPU only ever executes the body of the callback exactly once. > > if (already_booted()) > return 0; > > if (PREALLOCATED) > its_free_pending_table(); > else > gic_reserve_range(); > > out: > // callback removal faff here > return 0; > > Unfortunately, the boot CPU will already be present in > cpus_booted_once_mask when this is first invoked for the BP, so AFAICT we'd > need some new tracking utility (either a new RDIST_LOCAL flag or a separate > cpumask). > > WDYT? It'd certainly look saner. You may even be able to take advantage of the fact that the boot CPU is always 0. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel