From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0ADECC433E0 for ; Tue, 16 Mar 2021 13:24:17 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A39C164F37 for ; Tue, 16 Mar 2021 13:24:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A39C164F37 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Subject:Cc:To: From:Message-ID:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=hweKDMjIyfHeyJr7cOqXlf9IUfzlxZKTMQB9EpgjqA0=; b=DkPx8+dDt4dep2hq2GIJzpzcK o3XDWn4MWAsmgrud5CAmp4YP0uYnZIiB8PZQSNgv0MzyGB5qSaqH2NQIUvYN/gi5JrpIS0V1FUgBb 07m6BnNJrd8QcW8qpuPbJ54rTHt/+7RWS7JUbgJ9CMQ2Te/bbHZ+TcvH+cy+bIqdhaxqzDfW1Vl/T I6csLfpQza5CnHg/qebmpiBrQkFObgiC77c99cw6MYOhzRY4Fy/K6Y7QbpiKrSSRe9BukdmQVuSbM 4EiOsdaJE2qAIPBssqaYelislcrKkv0mS/IHd8D4AT69xVps8/J91aexkg2JeO6EIuL0r82OCFnKW orA7l4iAw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lM9eq-000p6x-By; Tue, 16 Mar 2021 13:22:48 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lM9el-000p6D-9q for linux-arm-kernel@lists.infradead.org; Tue, 16 Mar 2021 13:22:46 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D9E0C65054; Tue, 16 Mar 2021 13:22:41 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lM9eh-001yOE-Qs; Tue, 16 Mar 2021 13:22:39 +0000 Date: Tue, 16 Mar 2021 13:22:39 +0000 Message-ID: <878s6nfd28.wl-maz@kernel.org> From: Marc Zyngier To: Vladimir Murzin Cc: linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, dbrazdil@google.com Subject: Re: [PATCH][for-stable-v5.11]] arm64: Unconditionally set virtual cpu id registers In-Reply-To: <20210316112500.85268-1-vladimir.murzin@arm.com> References: <20210316112500.85268-1-vladimir.murzin@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: vladimir.murzin@arm.com, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, dbrazdil@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210316_132243_638255_4A3A8904 X-CRM114-Status: GOOD ( 25.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Vladimir, On Tue, 16 Mar 2021 11:25:00 +0000, Vladimir Murzin wrote: > > Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") > reorganized el2 setup in such way that virtual cpu id registers set > only in nVHE, yet they used (and need) to be set irrespective VHE > support. Lack of setup causes 32-bit guest stop booting due to MIDR > stay undefined. Surely this affects 64bit guests as well, doesn't it? I guess the 32bit code tries to infer stuff such as the architecture revision from MIDR and falls over, and that the 64bit Linux code has less baggage? > > Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") > Signed-off-by: Vladimir Murzin > --- > > There is no upstream fix since issue went away due to code there has > been reworked in 5.12: nVHE comes first, so virtual cpu id register > are always set. > > Maintainers, please, Ack. > > arch/arm64/include/asm/el2_setup.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index f988e94cdf9e..db87daca6b8c 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -113,7 +113,7 @@ > .endm > > /* Virtual CPU ID registers */ > -.macro __init_el2_nvhe_idregs > +.macro __init_el2_idregs > mrs x0, midr_el1 > mrs x1, mpidr_el1 > msr vpidr_el2, x0 > @@ -165,6 +165,7 @@ > __init_el2_stage2 > __init_el2_gicv3 > __init_el2_hstr > + __init_el2_idregs > > /* > * When VHE is not in use, early init of EL2 needs to be done here. > @@ -173,7 +174,6 @@ > * will be done via the _EL1 system register aliases in __cpu_setup. > */ > .ifeqs "\mode", "nvhe" > - __init_el2_nvhe_idregs > __init_el2_nvhe_cptr > __init_el2_nvhe_sve > __init_el2_nvhe_prepare_eret The couple of VHE systems I have around don't suffer from this issue, but it looks like I can trigger it on the FVP model (probably because the model is nasty enough to not have VPIDR_EL2 default to anything sensible!). Anyway, good catch. If you can respin it to drop the reference to 32bit guests, I'll happily ack it! Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel