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bh=ltlhWB/R+dYGhwgGAypvr2FmzCOvy+OJ80K5UktbZIE=; b=kV0XiLLpl4YNjd6gU8pjNriysy8QLHtVqlgAPiNuSIDpxocFAZ98E0y6tD6BaKry4u3SFN KAEvXGtWCbFfJtsbTk7yJq3ZoVQ9N7aclod3WLXq6l/Y+jorST7y0mPhxgv2doAaI7dLY3 2slj7/07RR5LtJZhp8A151pDaMflTE7+Qmp16V6a9/ckHcHP+gDvQjm7iJIjB3jT568ATs YwmvkArjHljO9a3iz7FyOpyoWz6YTyJUCcczcGtrMWWQvnbmzz2+pA09scVrJX9nMfuvUo 8Ngy9QYTATB++eYBEmYgM1qsF1qEupUNEHf4LbsyjXVDXYQWXcKb//pz1dNoIA== From: Miquel Raynal To: Richard Genoud Cc: Richard Weinberger , Vignesh Raghavendra , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Wentao Liang , Maxime Ripard , Boris Brezillon , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 6/6] mtd: rawnand: sunxi: introduce variable user data length In-Reply-To: <20260305100137.2558423-7-richard.genoud@bootlin.com> (Richard Genoud's message of "Thu, 5 Mar 2026 11:01:37 +0100") References: <20260305100137.2558423-1-richard.genoud@bootlin.com> <20260305100137.2558423-7-richard.genoud@bootlin.com> User-Agent: mu4e 1.12.7; emacs 30.2 Date: Thu, 12 Mar 2026 15:41:37 +0100 Message-ID: <87a4wdkt3y.fsf@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260312_074151_158208_BE7E8A39 X-CRM114-Status: GOOD ( 14.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Richard, On 05/03/2026 at 11:01:37 +01, Richard Genoud = wrote: > In Allwinner SoCs, user data can be added in OOB before each ECC data. > For older SoCs like A10, the user data size was the size of a register > (4 bytes) and was mandatory before each ECC step. > So, the A10 OOB Layout is: > [4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes] > [4bytes USER_DATA_STEP1] [ECC_STEP1 bytes] > ... > NB: the BBM is stored at the beginning of the USER_DATA_STEP0. > > Now, for H6/H616 NAND flash controller, this user data can have a > different size for each step. > And the vendor has chosen a different layout from the one on A10, using > 8 bytes for step 0 and nothing for further steps: > [8bytes USER_DATA_STEP0] [ECC_STEP0 bytes] [ECC_STEP1 bytes]... > (Still with BBM stored at the beginning of the USER_DATA_STEP0) I would rather be in favour of not following $(random vendor) firmware layout. Upstream, it makes probably more sense to just allow access to the maximum number of bytes that can be covered by the ECC engine, so I would rather be in favour of computing the maximum size that you can set for each step, without going over the OOB size. Once this set up, I believe adapting the driver locally (out of tree) to match a specific vendor layout would be rather straightforward, as all the configuration pieces would already be in place. Thanks, Miqu=C3=A8l