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Tue, 16 May 2023 08:20:06 +0100 Date: Tue, 16 May 2023 08:18:54 +0100 Message-ID: <87bkikwxpd.wl-maz@kernel.org> From: Marc Zyngier To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Mark Brown , linux-kernel@vger.kernel.org Subject: Re: [PATCH V2] arm64: Disable EL2 traps for BRBE instructions executed in EL1 In-Reply-To: References: <20230515105328.239204-1-anshuman.khandual@arm.com> <86ilctn233.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230516_002009_721363_EA98DE8A X-CRM114-Status: GOOD ( 23.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 16 May 2023 03:43:27 +0100, Anshuman Khandual wrote: > > > > On 5/15/23 19:12, Marc Zyngier wrote: > > On Mon, 15 May 2023 11:53:28 +0100, > > Anshuman Khandual wrote: > >> [...] > >> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > >> index 037724b19c5c..06bf321a17be 100644 > >> --- a/arch/arm64/include/asm/el2_setup.h > >> +++ b/arch/arm64/include/asm/el2_setup.h > >> @@ -161,6 +161,16 @@ > >> msr_s SYS_HFGWTR_EL2, x0 > >> msr_s SYS_HFGITR_EL2, xzr > >> > >> + mrs x1, id_aa64dfr0_el1 > >> + ubfx x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4 > >> + cbz x1, .Lskip_brbe_\@ > >> + > >> + mov x0, xzr > >> + orr x0, x0, #HFGITR_EL2_nBRBIALL > >> + orr x0, x0, #HFGITR_EL2_nBRBINJ > >> + msr_s SYS_HFGITR_EL2, x0 > > > > This will break badly if someone inserts something between this hunk > > and the initial setting of HFGITR_EL2. I'd really prefer a RMW > > approach. It's not that this code has to be optimised anyway. > > Something like this instead ? So that even if there are more changes > before this hunk, it will be fetched correctly with first mrs_s and > only additional bits related to BRBE will be set there after. > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index 037724b19c5c..bfaf41ad9c4e 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -161,6 +161,16 @@ > msr_s SYS_HFGWTR_EL2, x0 > msr_s SYS_HFGITR_EL2, xzr > > + mrs x1, id_aa64dfr0_el1 > + ubfx x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4 > + cbz x1, .Lskip_brbe_\@ > + > + mrs_s x0, SYS_HFGITR_EL2 > + orr x0, x0, #HFGITR_EL2_nBRBIALL > + orr x0, x0, #HFGITR_EL2_nBRBINJ > + msr_s SYS_HFGITR_EL2, x0 > + > +.Lskip_brbe_\@: > mrs x1, id_aa64pfr0_el1 // AMU traps UNDEF without AMU > ubfx x1, x1, #ID_AA64PFR0_EL1_AMU_SHIFT, #4 > cbz x1, .Lskip_fgt_\@ Yes, this is much better. M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel