* [PATCH 1/2] ARM: dts: renesas: r9a06g032: Fix UART dma channel order
2025-02-14 9:42 [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes Geert Uytterhoeven
@ 2025-02-14 9:42 ` Geert Uytterhoeven
2025-02-14 10:26 ` Miquel Raynal
2025-02-14 9:42 ` [PATCH 2/2] ARM: dts: renesas: r9a06g032: Drop snps,dw-apb-uart compatibility Geert Uytterhoeven
2025-02-14 9:44 ` [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes Biju Das
2 siblings, 1 reply; 6+ messages in thread
From: Geert Uytterhoeven @ 2025-02-14 9:42 UTC (permalink / raw)
To: Magnus Damm, Wolfram Sang, Miquel Raynal
Cc: linux-renesas-soc, linux-arm-kernel, devicetree,
Geert Uytterhoeven
make dtbs_check:
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:0: 'tx' was expected
from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:1: 'rx' was expected
from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
...
The DT bindings specify a fixed order of the channels in the dmas and
dma-names properties, while the Linux driver does not care.
Get rid of the warnings by changing the order in the DTS to match the
bindings.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 7548291c8d7ede43..87e03446fb4de705 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -211,8 +211,8 @@ uart3: serial@50000000 {
reg-io-width = <4>;
clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>;
clock-names = "baudclk", "apb_pclk";
- dmas = <&dmamux 0 0 0 0 0 1>, <&dmamux 1 0 0 0 1 1>;
- dma-names = "rx", "tx";
+ dmas = <&dmamux 1 0 0 0 1 1>, <&dmamux 0 0 0 0 0 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -224,8 +224,8 @@ uart4: serial@50001000 {
reg-io-width = <4>;
clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>;
clock-names = "baudclk", "apb_pclk";
- dmas = <&dmamux 2 0 0 0 2 1>, <&dmamux 3 0 0 0 3 1>;
- dma-names = "rx", "tx";
+ dmas = <&dmamux 3 0 0 0 3 1>, <&dmamux 2 0 0 0 2 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -237,8 +237,8 @@ uart5: serial@50002000 {
reg-io-width = <4>;
clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>;
clock-names = "baudclk", "apb_pclk";
- dmas = <&dmamux 4 0 0 0 4 1>, <&dmamux 5 0 0 0 5 1>;
- dma-names = "rx", "tx";
+ dmas = <&dmamux 5 0 0 0 5 1>, <&dmamux 4 0 0 0 4 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -250,8 +250,8 @@ uart6: serial@50003000 {
reg-io-width = <4>;
clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>;
clock-names = "baudclk", "apb_pclk";
- dmas = <&dmamux 6 0 0 0 6 1>, <&dmamux 7 0 0 0 7 1>;
- dma-names = "rx", "tx";
+ dmas = <&dmamux 7 0 0 0 7 1>, <&dmamux 6 0 0 0 6 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -263,8 +263,8 @@ uart7: serial@50004000 {
reg-io-width = <4>;
clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>;
clock-names = "baudclk", "apb_pclk";
- dmas = <&dmamux 4 0 0 0 20 1>, <&dmamux 5 0 0 0 21 1>;
- dma-names = "rx", "tx";
+ dmas = <&dmamux 5 0 0 0 21 1>, <&dmamux 4 0 0 0 20 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] ARM: dts: renesas: r9a06g032: Drop snps,dw-apb-uart compatibility
2025-02-14 9:42 [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes Geert Uytterhoeven
2025-02-14 9:42 ` [PATCH 1/2] ARM: dts: renesas: r9a06g032: Fix UART dma channel order Geert Uytterhoeven
@ 2025-02-14 9:42 ` Geert Uytterhoeven
2025-02-14 10:28 ` Miquel Raynal
2025-02-14 9:44 ` [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes Biju Das
2 siblings, 1 reply; 6+ messages in thread
From: Geert Uytterhoeven @ 2025-02-14 9:42 UTC (permalink / raw)
To: Magnus Damm, Wolfram Sang, Miquel Raynal
Cc: linux-renesas-soc, linux-arm-kernel, devicetree,
Geert Uytterhoeven
make dtbs_check:
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@40060000: compatible: 'oneOf' conditional failed, one must be fixed:
['renesas,r9a06g032-uart', 'renesas,rzn1-uart', 'snps,dw-apb-uart'] is too long
...
As per commit 72b0505f0830df95 ("dt: serial: Add Renesas RZ/N1 binding
documentation"), the RZ/N1 UART is a modified Synopsys DesignWare UART.
The modifications only relate to DMA, so you could actually use the
controller with the Synopsys compatible string if you are not using DMA,
but you should not do so. Hence the first three UARTs (which don't
support DMA) were added with a "snps,dw-apb-uart" fallback, to use the
existing Synopsys DesignWare UART support.
Since support for the RZ/N1-specific compatible value was added to the
driver a long time ago (commit 2ff5fa7f742ab0c6 ("serial: 8250_dw: Add
compatible string for Renesas RZ/N1 UART") in v4.19), the extra
compatible value can be dropped safely.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Alternatively, the bindings[1] could be augmented with an extra section:
- items:
- enum:
- renesas,r9a06g032-uart
- renesas,r9a06g033-uart
- const: renesas,rzn1-uart
- const: snps,dw-apb-uart # RZ/N1 without DMA
and perhaps extra logic to prohibit the dmas property when both
renesas,rzn1-uart and snps,dw-apb-uart are present.
Given the complexity of the latter, I went for the simple solution.
[1] Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
---
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 87e03446fb4de705..fc523106c2a4c6a0 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -171,7 +171,7 @@ usb@2,0 {
};
uart0: serial@40060000 {
- compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
+ compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
reg = <0x40060000 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
@@ -182,7 +182,7 @@ uart0: serial@40060000 {
};
uart1: serial@40061000 {
- compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
+ compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
reg = <0x40061000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
@@ -193,7 +193,7 @@ uart1: serial@40061000 {
};
uart2: serial@40062000 {
- compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
+ compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
reg = <0x40062000 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 2/2] ARM: dts: renesas: r9a06g032: Drop snps,dw-apb-uart compatibility
2025-02-14 9:42 ` [PATCH 2/2] ARM: dts: renesas: r9a06g032: Drop snps,dw-apb-uart compatibility Geert Uytterhoeven
@ 2025-02-14 10:28 ` Miquel Raynal
0 siblings, 0 replies; 6+ messages in thread
From: Miquel Raynal @ 2025-02-14 10:28 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Wolfram Sang, linux-renesas-soc, linux-arm-kernel,
devicetree
Hello Geert,
On 14/02/2025 at 10:42:04 +01, Geert Uytterhoeven <geert+renesas@glider.be> wrote:
> make dtbs_check:
>
> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@40060000: compatible: 'oneOf' conditional failed, one must be fixed:
> ['renesas,r9a06g032-uart', 'renesas,rzn1-uart', 'snps,dw-apb-uart'] is too long
> ...
>
> As per commit 72b0505f0830df95 ("dt: serial: Add Renesas RZ/N1 binding
> documentation"), the RZ/N1 UART is a modified Synopsys DesignWare UART.
> The modifications only relate to DMA, so you could actually use the
> controller with the Synopsys compatible string if you are not using DMA,
> but you should not do so. Hence the first three UARTs (which don't
> support DMA) were added with a "snps,dw-apb-uart" fallback, to use the
> existing Synopsys DesignWare UART support.
>
> Since support for the RZ/N1-specific compatible value was added to the
> driver a long time ago (commit 2ff5fa7f742ab0c6 ("serial: 8250_dw: Add
> compatible string for Renesas RZ/N1 UART") in v4.19), the extra
> compatible value can be dropped safely.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Alternatively, the bindings[1] could be augmented with an extra section:
>
> - items:
> - enum:
> - renesas,r9a06g032-uart
> - renesas,r9a06g033-uart
> - const: renesas,rzn1-uart
> - const: snps,dw-apb-uart # RZ/N1 without DMA
>
> and perhaps extra logic to prohibit the dmas property when both
> renesas,rzn1-uart and snps,dw-apb-uart are present.
I must say that I prefer this secondary approach, which feels more
accurate. I won't block the one that your proposed below for sure, but I
feel like it is more relevant to add this third entry in the bindings
rather than removing it from the DT. Either way, fine by me.
>
> Given the complexity of the latter, I went for the simple solution.
>
> [1] Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes
2025-02-14 9:42 [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes Geert Uytterhoeven
2025-02-14 9:42 ` [PATCH 1/2] ARM: dts: renesas: r9a06g032: Fix UART dma channel order Geert Uytterhoeven
2025-02-14 9:42 ` [PATCH 2/2] ARM: dts: renesas: r9a06g032: Drop snps,dw-apb-uart compatibility Geert Uytterhoeven
@ 2025-02-14 9:44 ` Biju Das
2 siblings, 0 replies; 6+ messages in thread
From: Biju Das @ 2025-02-14 9:44 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Wolfram Sang, Miquel Raynal,
Ralph Siemsen
Cc: linux-renesas-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
+CC
Ralph Siemsen <ralph.siemsen@linaro.org> who has RZ/N1 board.
> -----Original Message-----
> From: Geert Uytterhoeven <geert+renesas@glider.be>
> Sent: 14 February 2025 09:42
> To: Magnus Damm <magnus.damm@gmail.com>; Wolfram Sang <wsa+renesas@sang-engineering.com>; Miquel
> Raynal <miquel.raynal@bootlin.com>
> Cc: linux-renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; Geert Uytterhoeven <geert+renesas@glider.be>
> Subject: [PATCH 0/2] ARM: dts: renesas: r9a06g032: UART dtbs_check fixes
>
> Hi all,
>
> This patch series fixes two "make dtbs_check" issues for the RZ/N1 UARTs. As I do not have access to
> an RZ/N1 board, this was not tested on actual hardware.
Adding Ralph Siemsen <ralph.siemsen@linaro.org> who has RZ/N1 board.
Cheers,
Biju
>
> Thanks for your comments!
>
> Geert Uytterhoeven (2):
> ARM: dts: renesas: r9a06g032: Fix UART dma channel order
> ARM: dts: renesas: r9a06g032: Drop snps,dw-apb-uart compatibility
>
> arch/arm/boot/dts/renesas/r9a06g032.dtsi | 26 ++++++++++++------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> --
> 2.43.0
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But when I'm talking to
> journalists I just say "programmer" or something like that.
> -- Linus Torvalds
^ permalink raw reply [flat|nested] 6+ messages in thread