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Tue, 05 Nov 2024 08:35:56 +0000 Date: Tue, 05 Nov 2024 08:35:51 +0000 Message-ID: <87cyjat6vs.wl-maz@kernel.org> From: Marc Zyngier To: Catalin Marinas Cc: Yicong Yang , will@kernel.org, mark.rutland@arm.com, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, ryan.roberts@arm.com, linuxarm@huawei.com, jonathan.cameron@huawei.com, shameerali.kolothum.thodi@huawei.com, prime.zeng@hisilicon.com, xuwei5@huawei.com, wangkefeng.wang@huawei.com, yangyicong@hisilicon.com Subject: Re: [PATCH v4 3/5] arm64: Add support for FEAT_HAFT In-Reply-To: References: <20241102104235.62560-1-yangyicong@huawei.com> <20241102104235.62560-4-yangyicong@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 82.132.233.10 X-SA-Exim-Rcpt-To: catalin.marinas@arm.com, yangyicong@huawei.com, will@kernel.org, mark.rutland@arm.com, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, ryan.roberts@arm.com, linuxarm@huawei.com, jonathan.cameron@huawei.com, shameerali.kolothum.thodi@huawei.com, prime.zeng@hisilicon.com, xuwei5@huawei.com, wangkefeng.wang@huawei.com, yangyicong@hisilicon.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241105_003559_747762_9ED258D6 X-CRM114-Status: GOOD ( 24.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 04 Nov 2024 17:28:48 +0000, Catalin Marinas wrote: > > On Sat, Nov 02, 2024 at 06:42:33PM +0800, Yicong Yang wrote: > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > > index 3d261cc123c1..ed8c784ca082 100644 > > --- a/arch/arm64/include/asm/cpufeature.h > > +++ b/arch/arm64/include/asm/cpufeature.h > > @@ -838,6 +838,12 @@ static inline bool system_supports_poe(void) > > alternative_has_cap_unlikely(ARM64_HAS_S1POE); > > } > > > > +static inline bool system_supports_haft(void) > > +{ > > + return IS_ENABLED(CONFIG_ARM64_HAFT) && > > + cpus_have_final_cap(ARM64_HAFT); > > +} > > I'm fine with this approach. If we ever get hardware with mismatched > FEAT_HAFT and some secondary CPUs don't come up, we can revisit. > > > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > > index ccbae4525891..0bc88df7cb35 100644 > > --- a/arch/arm64/mm/proc.S > > +++ b/arch/arm64/mm/proc.S > > @@ -498,6 +498,10 @@ alternative_else_nop_endif > > and x9, x9, ID_AA64MMFR1_EL1_HAFDBS_MASK > > cbz x9, 1f > > orr tcr, tcr, #TCR_HA // hardware Access flag update > > + > > +#ifdef CONFIG_ARM64_HAFT > > + orr tcr2, tcr2, TCR2_EL1x_HAFT > > +#endif /* CONFIG_ARM64_HAFT */ > > 1: > > #endif /* CONFIG_ARM64_HW_AFDBM */ > > msr mair_el1, mair > > If you still want #ifdefs, I'd have left it outside the HW_AFDBM. We > already have a dependency in the Kconfig. Anyway, I can fix this up. > > I think as an additional patch we can also remove the ID checks for the > tcr bit in tge HW_AFDBM case. But that's unrelated to this series. I think you want to be careful with this one. I know of at least one implementation that has a broken FEAT_HAFDBS implementation, that removes it from the ID registers, but where the control bit in TCR_ELx still takes effect. Please see 6df696cd9bc1 ("arm64: errata: Mitigate Ampere1 erratum AC03_CPU_38 at stage-2") which indicates how we actually rely on the check for S1 translation. Thanks, M. -- Without deviation from the norm, progress is not possible.