From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Shuah Khan <shuah@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v14 3/5] KVM: arm64: Manage GCS access and registers for guests
Date: Sat, 05 Oct 2024 15:33:48 +0100 [thread overview]
Message-ID: <87cykevctv.wl-maz@kernel.org> (raw)
In-Reply-To: <ZwFMnhXGV_Nj31tE@finisterre.sirena.org.uk>
On Sat, 05 Oct 2024 15:26:38 +0100,
Mark Brown <broonie@kernel.org> wrote:
>
> [1 <text/plain; us-ascii (7bit)>]
> On Sat, Oct 05, 2024 at 03:02:09PM +0100, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
>
> > > Ah, I see. I'd been under the impression that the generic machinery was
> > > supposed to handle this already using the descriptions in
> > > emulate-nested.c and we only needed handlers for more specific actions.
>
> > From that very file:
>
> > /*
> > * Map encoding to trap bits for exception reported with EC=0x18.
> > [...]
> > */
>
> > Everything else needs special handling.
>
> I see. I had noticed that comment on that table but I didn't register
> that the comment wound up applying to the whole file rather than being
> about a specific part of the handling. I'm a bit confused about how
> things like the SVE traps I mentioned work here...
Like all ECs, the handling starts in handle_exit.c.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2024-10-05 14:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-05 10:37 [PATCH v14 0/5] KVM: arm64: Provide guest support for GCS Mark Brown
2024-10-05 10:37 ` [PATCH v14 1/5] KVM: arm64: Expose S1PIE to guests Mark Brown
2024-10-05 10:37 ` [PATCH v14 2/5] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2024-10-05 10:37 ` [PATCH v14 3/5] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2024-10-05 11:34 ` Marc Zyngier
2024-10-05 13:08 ` Mark Brown
2024-10-05 13:18 ` Marc Zyngier
2024-10-05 13:48 ` Mark Brown
2024-10-05 14:02 ` Marc Zyngier
2024-10-05 14:26 ` Mark Brown
2024-10-05 14:33 ` Marc Zyngier [this message]
2024-10-05 10:37 ` [PATCH v14 4/5] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2024-10-05 12:36 ` Marc Zyngier
2024-10-05 14:14 ` Mark Brown
2024-10-05 16:35 ` Marc Zyngier
2024-10-05 10:37 ` [PATCH v14 5/5] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
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