From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C66B0C77B7E for ; Thu, 1 Jun 2023 12:32:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jHjVLmSdjJLE0Tiy1HM9tslct+X/NYUmD42t5QzHyNg=; b=0sZ1lF0xkSoMrf kfA/81AFCIJZgDfCX8etIggLjUbtEtXpE06MBmfSafFoKmKDD1tK/LhvHC8ewK74bAEzy1iBFub8O Z/TXsL84Y7x4XNcuIl89RUxDXASmzsHwOoaqJFyPDGPy7vAhj2qbT3Y5NVRRFp+fPXL+FZq6ojmUB g7n2Qzy3tmmWafmYA6bqxZMKwhd1UVNJK9NMbAQClCtH6CT3CSZRq42/818Z79YRyLBrwaEFOzRCZ 0LQc539AC48MSbxkUQUd6utmXj+qW17HpxNmPCFiXVckYmEDrIL4hfBopI1KGdadUDHILwqWFgUhR PQzYeTxV612t9MsIoYQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4hTm-003Z0K-2d; Thu, 01 Jun 2023 12:32:34 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4hP3-003Vso-0J for linux-arm-kernel@lists.infradead.org; Thu, 01 Jun 2023 12:27:42 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 748BD643FE; Thu, 1 Jun 2023 12:27:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D46FCC433EF; Thu, 1 Jun 2023 12:27:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685622459; bh=HyqkcnhCU5T36iXrGBlL9WIuUqjX4QxbHofEbqsAwkk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=f+QcCTK05Tz+YiIS2CTYV4uaSzK2H6olrm3kWNViE8Y6hRPKjdHJ8kJZCwnj+JcIq kaPpjIS+BMEkmQVpJV+gKEuQpiz1e/kochL/Tghgn4++sQ6fL+4qCtCu1qWn4/6PEg 48xGKB5zpcdXH4vtQGf1AwGw3xx9wxO3qslQEXVWS8T2TXWQ/M4ukk1zIaHnHu/njO +TO/XRvmVn4nNAmWdDD7K2dnTh93cNLhcYSPuCQhKHwo034SjaG37cJcf3Ucfau5Wi hZ7RRGDNktXZM9KSiWl3OLtSuQzIsGplHVYJ/p8qEU3xoXtR0lXYk1HYEAFICDX+X8 X5ydAD6PcdzqA== Received: from 90.4.23.109.rev.sfr.net ([109.23.4.90] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1q4hOz-00213h-5X; Thu, 01 Jun 2023 13:27:37 +0100 Date: Thu, 01 Jun 2023 13:27:35 +0100 Message-ID: <87cz2fpdu0.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Zenghui Yu , Quentin Perret , Will Deacon , Fuad Tabba Subject: Re: [PATCH v2 04/17] arm64: Add KVM_HVHE capability and has_hvhe() predicate In-Reply-To: References: <20230526143348.4072074-1-maz@kernel.org> <20230526143348.4072074-5-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 109.23.4.90 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, qperret@google.com, will@kernel.org, tabba@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_052741_210028_0AD426B0 X-CRM114-Status: GOOD ( 33.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Oliver, On Thu, 01 Jun 2023 08:06:24 +0100, Oliver Upton wrote: > > Hey Marc, > > I'm an idiot and was responding to v1. Here's the same damn comment, but > on v2! Probably means that I'm even more of an idiot by sending the same buggy code twice! :D > > On Fri, May 26, 2023 at 03:33:35PM +0100, Marc Zyngier wrote: > > Expose a capability keying the hVHE feature as well as a new > > predicate testing it. Nothing is so far using it, and nothing > > is enabling it yet. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/cpufeature.h | 1 + > > arch/arm64/include/asm/virt.h | 8 ++++++++ > > arch/arm64/kernel/cpufeature.c | 15 +++++++++++++++ > > arch/arm64/tools/cpucaps | 1 + > > 4 files changed, 25 insertions(+) > > > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > > index bc1009890180..3d4b547ae312 100644 > > --- a/arch/arm64/include/asm/cpufeature.h > > +++ b/arch/arm64/include/asm/cpufeature.h > > @@ -16,6 +16,7 @@ > > #define cpu_feature(x) KERNEL_HWCAP_ ## x > > > > #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR 0 > > +#define ARM64_SW_FEATURE_OVERRIDE_HVHE 4 > > > > #ifndef __ASSEMBLY__ > > > > diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h > > index 91029709d133..5f84a87a6a2d 100644 > > --- a/arch/arm64/include/asm/virt.h > > +++ b/arch/arm64/include/asm/virt.h > > @@ -145,6 +145,14 @@ static __always_inline bool is_protected_kvm_enabled(void) > > return cpus_have_final_cap(ARM64_KVM_PROTECTED_MODE); > > } > > > > +static __always_inline bool has_hvhe(void) > > +{ > > + if (is_vhe_hyp_code()) > > + return false; > > + > > + return cpus_have_final_cap(ARM64_KVM_HVHE); > > +} > > + > > static inline bool is_hyp_nvhe(void) > > { > > return is_hyp_mode_available() && !is_kernel_in_hyp_mode(); > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 2d2b7bb5fa0c..04ef60571b37 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -1998,6 +1998,15 @@ static bool has_nested_virt_support(const struct arm64_cpu_capabilities *cap, > > return true; > > } > > > > +static bool hvhe_possible(const struct arm64_cpu_capabilities *entry, > > + int __unused) > > +{ > > + u64 val; > > + > > + val = arm64_sw_feature_override.val & arm64_sw_feature_override.mask; > > + return cpuid_feature_extract_unsigned_field(val, ARM64_SW_FEATURE_OVERRIDE_HVHE); > > +} > > Does this need to test ID_AA64MMFR1_EL1.VH as well? Otherwise I don't > see what would stop us from attempting hVHE on a system with asymmetric > support for VHE, as the software override was only evaluated on the boot > CPU. Huh. You obviously have a filthy mind. Yeah, we could also test for the sanitised view of MMFR1.VH and change our mind at the last minute. I'll add a check. It also probably means that I need to make this a "ARM64_CPUCAP_SYSTEM_FEATURE" instead of a "ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE" (I think...). But it has to be said that such a system, even without my hacks, would badly explode if the boot CPU was VHE capable and a secondary wasn't. The boot logic would keep one CPU at EL2 and move the secondary to EL1, and things would seamingly work until you try to do things like TLB invalidation (and you probably wouldn't even get a timer interrupt...). Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel