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Tue, 16 May 2023 07:55:23 -0400 X-MC-Unique: ZmlMnNkGOxCQCpdbM_NETQ-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.rdu2.redhat.com [10.11.54.2]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 8AC372801A68; Tue, 16 May 2023 11:55:16 +0000 (UTC) Received: from localhost (dhcp-192-239.str.redhat.com [10.33.192.239]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4CEAC40C6EC4; Tue, 16 May 2023 11:55:15 +0000 (UTC) From: Cornelia Huck To: Shameerali Kolothum Thodi , Marc Zyngier Cc: Jing Zhang , KVM , KVMARM , ARMLinux , Oliver Upton , Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Raghavendra Rao Ananta Subject: RE: [PATCH v8 0/6] Support writable CPU ID registers from userspace In-Reply-To: <1a96a72e87684e2fb3f8c77e32516d04@huawei.com> Organization: Red Hat GmbH References: <20230503171618.2020461-1-jingzhangos@google.com> <2ef9208dabe44f5db445a1061a0d5918@huawei.com> <868rdomtfo.wl-maz@kernel.org> <1a96a72e87684e2fb3f8c77e32516d04@huawei.com> User-Agent: Notmuch/0.37 (https://notmuchmail.org) Date: Tue, 16 May 2023 13:55:14 +0200 Message-ID: <87cz30h4nx.fsf@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230516_050308_169259_5920E417 X-CRM114-Status: GOOD ( 20.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 16 2023, Shameerali Kolothum Thodi wrote: >> -----Original Message----- >> From: Marc Zyngier [mailto:maz@kernel.org] >> Sent: 16 May 2023 12:01 >> To: Shameerali Kolothum Thodi >> Cc: Jing Zhang ; KVM ; >> KVMARM ; ARMLinux >> ; Oliver Upton ; >> Will Deacon ; Paolo Bonzini ; >> James Morse ; Alexandru Elisei >> ; Suzuki K Poulose ; >> Fuad Tabba ; Reiji Watanabe ; >> Raghavendra Rao Ananta >> Subject: Re: [PATCH v8 0/6] Support writable CPU ID registers from >> userspace >> >> On Tue, 16 May 2023 11:37:20 +0100, >> Shameerali Kolothum Thodi >> wrote: >> > >> > > -----Original Message----- >> > > From: Jing Zhang [mailto:jingzhangos@google.com] >> > > Sent: 03 May 2023 18:16 >> > > To: KVM ; KVMARM ; >> > > ARMLinux ; Marc Zyngier >> > > ; Oliver Upton >> > > Cc: Will Deacon ; Paolo Bonzini >> ; >> > > James Morse ; Alexandru Elisei >> > > ; Suzuki K Poulose >> ; >> > > Fuad Tabba ; Reiji Watanabe ; >> > > Raghavendra Rao Ananta ; Jing Zhang >> > > >> > > Subject: [PATCH v8 0/6] Support writable CPU ID registers from >> userspace >> > > >> > > This patchset refactors/adds code to support writable per guest CPU ID >> > > feature >> > > registers. Part of the code/ideas are from >> > > >> https://lore.kernel.org/all/20220419065544.3616948-1-reijiw@google.com >> > >> > Hi Jing/Reiji, >> > >> > Just to check the status on the above mentioned series "KVM: arm64: Make >> CPU >> > ID registers writable by userspace". Is there any plan to respin that one >> soon? >> > (Sorry, not sure there is any other series in progress for that support >> currently) >> >> I think this still is the latest, which I'm about to review again. I'd >> appreciate if you could have a look to! > > Thanks Marc for confirming. Will go through. We do have some requirement to > add support for Qemu CPU models/migration between different hosts. Do you have more concrete ideas for QEMU CPU models already? Asking because I wanted to talk about this at KVM Forum, so collecting what others would like to do seems like a good idea :) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel