From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19715C30653 for ; Thu, 4 Jul 2024 10:32:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Message-ID:Date:References:In-Reply-To:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ll1789K3RZMo075IXKmdTE4mfwiU9AkaVkKOsPwli5c=; b=Qg2mwr0RkXbiK6JSrwlNccdkSb NaxjHd8Uwduuij63R9CoXTIFLWqJm2m3wLtYITYME42eF5V7uILZal9gk37hVZi0JCQ2iqwwBG1sg 0cgOJukB2BNyBK2skyjO8ZLLv0N3y/qlrvpjWOnXc12NmerY0H5Bkoz+gMdnwzjmaDEyJ80xWySQA vL68l+CMnFcCRTpFmNlpnzJ/hyiRYJzmbvRDr7IgpSi3l1eVai4m3eW73gjxo/xHROhQE8E8ASnmC VX9PiDz3BGIpLJ9w4ZfJFIam5xReepgoLCjMEeJHZdqudBJHOXH83/SqOtzB2IHyUhENYxbMTFL0M qBDp20Wg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sPJlZ-0000000CsWX-0pwI; Thu, 04 Jul 2024 10:32:41 +0000 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sPJlL-0000000CsTV-2Jej for linux-arm-kernel@lists.infradead.org; Thu, 04 Jul 2024 10:32:28 +0000 Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-a77b4387302so61057866b.1 for ; Thu, 04 Jul 2024 03:32:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720089146; x=1720693946; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:message-id:date:references :in-reply-to:subject:cc:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Ll1789K3RZMo075IXKmdTE4mfwiU9AkaVkKOsPwli5c=; b=XFcN8Vm9XP3igAIpw5VXAOP1S7oPCdZRHQxGMs8gaVg5HVT5NF0CbQ+xlz7Ma8eHpI HEyNpCXzV8GON61UAc72PEDX8pB4AGXWt8PueEaKp9e7kE9czvOejwHP/evDt+sB9S98 1sGBxLtJ1E1Tb/fK/SEwn03ObhXEqAFNfAF+lxPoNOlOyfXpuX5+a7O/0XYLfwho3d+I Q7CCPO5mhyrUG5kbbs7U44oEDW0cqtTbg0QbXtWMVBjm0CfMNy7HJsh0nCuFxo1+RrCH g4DUUk0THXjYJyjymL4zgtgpIWJm1vRfvoa8WqUQesvXbVMPKCoDbeuiz5gl2CE5wax5 0wMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720089146; x=1720693946; h=content-transfer-encoding:mime-version:message-id:date:references :in-reply-to:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ll1789K3RZMo075IXKmdTE4mfwiU9AkaVkKOsPwli5c=; b=kdhvO3+WGrNjE/jSKnNTQGtcXyyGFzlc26f8EXyC1ITiZdA5J3id+FXk8onIqyatBD AsbxVFxJqBH9xKjtpiLKoYa9fqK+ZAmgMwSm3awXW8SwR6D3kPXnanhYGsfqNA+h2MCp V7HB8Cse/1ublKie6KJZ5t9DuZSfs//L94GcQMw0LFWJltoGbEGyfZ/TfjNLo+INC0X2 zYJk0PZezf8v5QrJLqoTt/B3YtxiUlEA1fOeEjHXpsnvsQ5dd4V0GZDrUfG1O+059eK7 x1cxlcZIjnNQOKdg0wBFG7FduE39ByiR4eP/ePMYZ7wjqu2Gz4QYs9JaZY2EaQ9qxcig TDIA== X-Forwarded-Encrypted: i=1; AJvYcCVcshfPnpfhhdGMgW6uvZ+/Y3SUlu93nOluzTLkMun65YYoNg0MtJ/VPkTCsMVXnJu08tEq3BLkltTaeVPFLq51oTvXb1SKt6luyfA1UuaUhNXUNzU= X-Gm-Message-State: AOJu0YybwIs4zbZ45fI9x/kSqg1FSpKV6JF6WoCUDjMfPjNZxm3Rn69G tBR2oOnsCZEoC+MUoVEu9cjoJLmgT0n9msGXoWEQZEEu+bO44bYaAlYDVuQIoyA= X-Google-Smtp-Source: AGHT+IEUr/k4wsuFFI1HpUUBu37YY6nVBx+aUz1aY2C4uipNzYsojCSOZ6mn0U5wAAIP7oQlfcyt0g== X-Received: by 2002:a17:907:c25:b0:a6f:51b3:cbbd with SMTP id a640c23a62f3a-a77ba45568amr98177066b.4.1720089145286; Thu, 04 Jul 2024 03:32:25 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a77ba8dab57sm35135566b.55.2024.07.04.03.32.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Jul 2024 03:32:24 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id D11015F839; Thu, 4 Jul 2024 11:32:23 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Marc Zyngier Cc: Zenghui Yu , pbonzini@redhat.com, thuth@redhat.com, kvm@vger.kernel.org, qemu-arm@nongnu.org, linux-arm-kernel@lists.infradead.org, christoffer.dall@arm.com, Anders Roxell , Andrew Jones , Alexandru Elisei , Eric Auger , "open list:ARM" Subject: Re: [kvm-unit-tests PATCH v1 1/2] arm/pmu: skip the PMU introspection test if missing In-Reply-To: <74e184afbc4b58fba984b91964915a9e@kernel.org> (Marc Zyngier's message of "Wed, 03 Jul 2024 08:23:37 +0100") References: <20240702163515.1964784-1-alex.bennee@linaro.org> <20240702163515.1964784-2-alex.bennee@linaro.org> <8c11996c-b36d-e560-cdeb-e543ee478a54@huawei.com> <74e184afbc4b58fba984b91964915a9e@kernel.org> Date: Thu, 04 Jul 2024 11:32:23 +0100 Message-ID: <87ed89o3bc.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240704_033227_637552_5BA77137 X-CRM114-Status: GOOD ( 16.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Marc Zyngier writes: > On 2024-07-03 08:09, Zenghui Yu wrote: >> On 2024/7/3 0:35, Alex Benn=C3=A9e wrote: >>> The test for number of events is not a substitute for properly >>> checking the feature register. Fix the define and skip if PMUv3 is not >>> available on the system. This includes emulator such as QEMU which >>> don't implement PMU counters as a matter of policy. >>> Signed-off-by: Alex Benn=C3=A9e >>> Cc: Anders Roxell >>> --- >>> arm/pmu.c | 7 ++++++- >>> 1 file changed, 6 insertions(+), 1 deletion(-) >>> diff --git a/arm/pmu.c b/arm/pmu.c >>> index 9ff7a301..66163a40 100644 >>> --- a/arm/pmu.c >>> +++ b/arm/pmu.c >>> @@ -200,7 +200,7 @@ static void test_overflow_interrupt(bool >>> overflow_at_64bits) {} >>> #define ID_AA64DFR0_PERFMON_MASK 0xf >>> #define ID_DFR0_PMU_NOTIMPL 0b0000 >>> -#define ID_DFR0_PMU_V3 0b0001 >>> +#define ID_DFR0_PMU_V3 0b0011 >> Why? This is a macro used for AArch64 and DDI0487J.a (D19.2.59, the >> description of the PMUVer field) says that >> "0b0001 Performance Monitors Extension, PMUv3 implemented." >> while 0b0011 is a reserved value. > > I think this is a mix of 32bit and 64bit views (ID_DFR0_EL1.PerfMon > instead of ID_AA64DFR0_EL1.PMUVer), and the whole thing is a mess > (ID_AA64DFR0_PERFMON_MASK is clearly confused...). > > I haven't looked at how this patch fits in the rest of the code > though. Doh - yes different set of values for 32 bit. > > M. --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro