From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 292B9C433EF for ; Mon, 20 Dec 2021 12:05:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tIyGfaFthtYZGkKUFz6NTPwoaUFl2xhUyzwEKEqaptw=; b=VOPAKBOVAJSv2b y9V2Z2dN54Ka8bX0Cgd04VdoKwxRDk/nBXR84jFXql+ZDanG2q0tVf1lRiL++s2VJY9ixmOtP7ba6 WUTW0Zan5TEisy1x6PQ9BlmrDFLL8iVzdhbzctrjW9xAw92EveUElueI/tj4jandYx07PUuPCThRW ehEP8YKVYU3Ghg6rBAy+hGO+aXrBJV9nWocY0jYuHilvgRKXAzjajLYGPSxJolv5bhlC0ff+BG04m gCTjFS1dtOYSIkTiTEheAlivEGjRzxPGAWf3qPFfpozdYLYN45v/uTJ/N4AEeuTWXactVIibYXnye QSnbuzp800X9NX8kV0KQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mzHOB-002BRp-D8; Mon, 20 Dec 2021 12:03:35 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mzHO7-002BQR-B2 for linux-arm-kernel@lists.infradead.org; Mon, 20 Dec 2021 12:03:32 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A322A60F7C; Mon, 20 Dec 2021 12:03:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 103B2C36AE9; Mon, 20 Dec 2021 12:03:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1640001810; bh=6O0xiRnztySYQBvcYuliRnXkQzh8FHt8rqhadQ7EmKw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=qNFMg/2wJHh03/PAgUg6K1bRgeSzNYQUzEULCstpzGHMi1mWBYIt+MVwWGrYQwzJi x4/G77Jgq5RcWrFhfoQnE8B1TWnjjiyZpqMRnjg+bmGMEb8dbUwi5a47e5pDMOi8Dj cWyY+xNx+qb766v7zoBRV7MOjJjbllOHpCsc2vU6IttI3N+/cexi3pOQi6gaU5hYqF fxuK2/ved7btr5+1eSDZi+jgLALO3qb8g3ObJvh22DH5Ji8SERqrvWecXTVVJS4k5O 0p84NVvYN0+SZqjMuIPbmdu1OCJ7MJOyYXnhr43Z9L2nlu34sbhkovI1NdMXa/FuIb dC2hEDCMGiS3A== Received: from cfbb000407.r.cam.camfibre.uk ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mzHO3-00DHBa-QS; Mon, 20 Dec 2021 12:03:28 +0000 Date: Mon, 20 Dec 2021 12:03:27 +0000 Message-ID: <87ee67wkj4.wl-maz@kernel.org> From: Marc Zyngier To: D Scott Phillips Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Darren Hart , patches@amperecomputing.com Subject: Re: [PATCH v4] arm64: errata: Fix exec handling in erratum 1418040 workaround In-Reply-To: <20211217211920.2004032-1-scott@os.amperecomputing.com> References: <20211217211920.2004032-1-scott@os.amperecomputing.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: scott@os.amperecomputing.com, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, darren@os.amperecomputing.com, patches@amperecomputing.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211220_040331_490987_0195C54A X-CRM114-Status: GOOD ( 36.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 17 Dec 2021 21:19:20 +0000, D Scott Phillips wrote: > > The erratum 1418040 workaround enables vct access trapping when executing nit: s/vct/CNTVCT_EL1/. > compat threads. The workaround is applied when switching between tasks, but > the need for the workaround could also change at an exec(), when a > non-compat task execs a compat binary or vice versa. Apply the workaround > in arch_setup_new_exec(). > > The leaves a small window of time between SET_PERSONALITY and > arch_setup_new_exec where preemption could occur and confuse the old > workaround logic that compares TIF_32BIT between prev and next. Instead, we > can just read cntkctl to make sure it's in the state that the next task > needs. I measured cntkctl read time to be about the same as a mov from a > general-purpose register on N1. Update the workaround logic to examine the > current value of cntkctl instead of the previous task's compat state. > > Fixes: d49f7d7376d0 ("arm64: Move handling of erratum 1418040 into C code") > Signed-off-by: D Scott Phillips > Cc: # 5.4.x > --- > > v4: - Move exec() handling into arch_setup_new_exec(), drop prev32==next32 > comparison to fix possible confusion in the small window between > SET_PERSONALITY() and arch_setup_new_exec(). (Catalin) > > v3: - Un-nest conditionals (Marc) > > v2: - Use sysreg_clear_set instead of open coding (Marc) > - guard this_cpu_has_cap() check under IS_ENABLED() to avoid tons of > WARN_ON(preemptible()) when built with !CONFIG_ARM64_ERRATUM_1418040 > > arch/arm64/kernel/process.c | 34 ++++++++++++---------------------- > 1 file changed, 12 insertions(+), 22 deletions(-) > > diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c > index aacf2f5559a8..b37ff23e625e 100644 > --- a/arch/arm64/kernel/process.c > +++ b/arch/arm64/kernel/process.c > @@ -439,34 +439,23 @@ static void entry_task_switch(struct task_struct *next) > > /* > * ARM erratum 1418040 handling, affecting the 32bit view of CNTVCT. > - * Assuming the virtual counter is enabled at the beginning of times: > - * > - * - disable access when switching from a 64bit task to a 32bit task > - * - enable access when switching from a 32bit task to a 64bit task > + * Ensure access is disabled when switching to a 32bit task, ensure > + * access is enabled when switching to a 64bit task. > */ > -static void erratum_1418040_thread_switch(struct task_struct *prev, > - struct task_struct *next) > +static void erratum_1418040_thread_switch(struct task_struct *next) > { > - bool prev32, next32; > - u64 val; > - > - if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040)) > - return; > + preempt_disable(); I'd rather avoid this on the __switch_to() path. We're guaranteed to be non-preemptible when called from there, and we want it to be as fast as possible. It would also avoid the bug on the early return just below. > > - prev32 = is_compat_thread(task_thread_info(prev)); > - next32 = is_compat_thread(task_thread_info(next)); > - > - if (prev32 == next32 || !this_cpu_has_cap(ARM64_WORKAROUND_1418040)) > + if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040) || > + !this_cpu_has_cap(ARM64_WORKAROUND_1418040)) > return; > > - val = read_sysreg(cntkctl_el1); > - > - if (!next32) > - val |= ARCH_TIMER_USR_VCT_ACCESS_EN; > + if (is_compat_thread(task_thread_info(next))) > + sysreg_clear_set(cntkctl_el1, ARCH_TIMER_USR_VCT_ACCESS_EN, 0); > else > - val &= ~ARCH_TIMER_USR_VCT_ACCESS_EN; > + sysreg_clear_set(cntkctl_el1, 0, ARCH_TIMER_USR_VCT_ACCESS_EN); > > - write_sysreg(val, cntkctl_el1); > + preempt_enable(); > } > > /* > @@ -501,7 +490,7 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev, > contextidr_thread_switch(next); > entry_task_switch(next); > ssbs_thread_switch(next); > - erratum_1418040_thread_switch(prev, next); > + erratum_1418040_thread_switch(next); > ptrauth_thread_switch_user(next); > > /* > @@ -611,6 +600,7 @@ void arch_setup_new_exec(void) > current->mm->context.flags = mmflags; > ptrauth_thread_init_user(); > mte_thread_init_user(); > + erratum_1418040_thread_switch(current); But what is the point of this now? As you enter __switch_to(), the TIF flags are set in stone for this particular return to userspace. Since you are now evaluating the state of CNTKCTL_EL1 on each and every switch, you are guaranteed to set the enable bit to the right value on each return to userspace, even if you have gone via SET_PERSONALITY(). Am I missing something? Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel