[PATCH 0/2] Add Apple interrupt controller 3 support

[PATCH 0/2] Add Apple interrupt controller 3 support

[Janne Grunau]

Add yet another variant of Apple's interrupt controller. This one might
to stick for more SoC variants than their predecessors. According to
Apple's device trees it is used on all SoCs since the M3 (t8122) up to
M5 (t8142). This information is not 100% reliable since macOS uses
different kernel builds for each SoC variant.
As far as the functionality implemented in the Linux driver it is almost
identical to AICv2. The only noticeable difference is an increased
IRQ_CFG offset.
AICv3 uses the same device tree bindings as AICv2 so add its compatible
to the existing apple,aic2.yaml.
Apple's device tree added many MMIO offsets as properties for the
"aic,3" node. The offsets are the same for all released SoCs with AICv3
so the Linux driver continues to use hard coded offsets.
Compatible strings for AICv3 will be SoC specific like
"apple,t8122-aic3" so a potential future SoC with different offsets
would use a new base compatible string for which the driver uses
different MMIO offsets.
While the offsets are the same on M4 and later SoCs access to
implementation defined system registers will require different
compatible strings.

Signed-off-by: Janne Grunau <j@jannau.net>
---
Janne Grunau (2):
      dt-bindings: interrupt-controller: apple,aic2: Add AICv3
      irqchip/apple-aic: Add support for "apple,t8122-aic3"

 .../bindings/interrupt-controller/apple,aic2.yaml  | 29 +++++++++++++++-------
 drivers/irqchip/irq-apple-aic.c                    | 27 ++++++++++++++++++--
 2 files changed, 45 insertions(+), 11 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20260119-irq-apple-aic3-0314f6aa2a2a

Best regards,
-- 
Janne Grunau <j@jannau.net>

[PATCH 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Janne Grunau]

AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
in its base functionality. It can use the same device tree bindings as
AICv2 so add it to the AICv2 bindings.
This interrupt controller is used on all Apple SoCs starting with M3 up
to at least M5.
The only apparent difference is the increased IRQ config offset. Apple's
device tree codes this new offset as property of the "aic" node but the
value stayed constant for all SoCs with "aic,3". Since the SoC specific
compatible "apple,t8122-aic3" will be used in the driver this offset can
remain a driver implementation detail.

Signed-off-by: Janne Grunau <j@jannau.net>
---
 .../bindings/interrupt-controller/apple,aic2.yaml  | 29 +++++++++++++++-------
 1 file changed, 20 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
index ee5a0dfff437816056bda0de5523bf38be4f49ba..933e134d82bb599a68707ba34e04ea55d61050b9 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
@@ -4,10 +4,10 @@
 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Apple Interrupt Controller 2
+title: Apple Interrupt Controller 2 and 3
 
 maintainers:
-  - Hector Martin <marcan@marcan.st>
+  - Janne Grunau <j@jannau.net>
 
 description: |
   The Apple Interrupt Controller 2 is a simple interrupt controller present on
@@ -28,14 +28,23 @@ description: |
   which do not go through a discrete interrupt controller. It also handles
   FIQ-based Fast IPIs.
 
+  The Apple Interrupt Controller 3 is in its base functionality very similar to
+  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
+  found on Apple ARM SoCs platforms starting with t8122 (M3).
+
 properties:
   compatible:
-    items:
-      - enum:
-          - apple,t8112-aic
-          - apple,t6000-aic
-          - apple,t6020-aic
-      - const: apple,aic2
+    oneOf:
+      - items:
+          - enum:
+              - apple,t8112-aic
+              - apple,t6000-aic
+              - apple,t6020-aic
+          - const: apple,aic2
+      - items:
+          - enum:
+              - apple,t6030-aic3
+          - const: apple,t8122-aic3
 
   interrupt-controller: true
 
@@ -117,7 +126,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: apple,t8112-aic
+            enum:
+              - apple,t8112-aic
+              - apple,t8122-aic3
     then:
       properties:
         '#interrupt-cells':

-- 
2.52.0

[PATCH 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3"

[Janne Grunau]

Introduce support for the new AICv3 hardware block in t8122 and t603x
SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset.
These MMIO offsets are coded as properties of the "aic,3" node in
Apple's device tree. The actual offsets are the same for all SoCs
starting from M3 through at least M5. So do not bother to follow suit
but use AICv3 specific defines in the driver.
The compatible string is SoC specific so future SoCs with AICv3 and
different offsets would just use their own compatible string as base and
add their new offsets.

Signed-off-by: Janne Grunau <j@jannau.net>
---
 drivers/irqchip/irq-apple-aic.c | 27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
index 3c70364e7cddd6ed6285595f136146ab04b897b2..f4efc325bebad1ae6119aa4eab47819a267da207 100644
--- a/drivers/irqchip/irq-apple-aic.c
+++ b/drivers/irqchip/irq-apple-aic.c
@@ -54,6 +54,7 @@
 #include <linux/irqdomain.h>
 #include <linux/jump_label.h>
 #include <linux/limits.h>
+#include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/slab.h>
 #include <asm/apple_m1_pmu.h>
@@ -134,8 +135,15 @@
 
 #define AIC2_IRQ_CFG		0x2000
 
+/*
+ * AIC v3 registers (MMIO)
+ */
+
+#define AIC3_IRQ_CFG		0x10000
+
 /*
  * AIC2 registers are laid out like this, starting at AIC2_IRQ_CFG:
+ * AIC3 registers use the same layout but start at AIC3_IRQ_CFG:
  *
  * Repeat for each die:
  *   IRQ_CFG: u32 * MAX_IRQS
@@ -293,6 +301,15 @@ static const struct aic_info aic2_info __initconst = {
 	.local_fast_ipi = true,
 };
 
+static const struct aic_info aic3_info __initconst = {
+	.version	= 3,
+
+	.irq_cfg	= AIC3_IRQ_CFG,
+
+	.fast_ipi	= true,
+	.local_fast_ipi = true,
+};
+
 static const struct of_device_id aic_info_match[] = {
 	{
 		.compatible = "apple,t8103-aic",
@@ -310,6 +327,10 @@ static const struct of_device_id aic_info_match[] = {
 		.compatible = "apple,aic2",
 		.data = &aic2_info,
 	},
+	{
+		.compatible = "apple,t8122-aic3",
+		.data = &aic3_info,
+	},
 	{}
 };
 
@@ -620,7 +641,7 @@ static int aic_irq_domain_map(struct irq_domain *id, unsigned int irq,
 	u32 type = FIELD_GET(AIC_EVENT_TYPE, hw);
 	struct irq_chip *chip = &aic_chip;
 
-	if (ic->info.version == 2)
+	if (ic->info.version == 2 || ic->info.version == 3)
 		chip = &aic2_chip;
 
 	if (type == AIC_EVENT_TYPE_IRQ) {
@@ -991,6 +1012,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 
 		break;
 	}
+	case 3:
 	case 2: {
 		u32 info1, info3;
 
@@ -1065,7 +1087,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 		off += irqc->info.die_stride;
 	}
 
-	if (irqc->info.version == 2) {
+	if (irqc->info.version == 2 || irqc->info.version == 3) {
 		u32 config = aic_ic_read(irqc, AIC2_CONFIG);
 
 		config |= AIC2_CONFIG_ENABLE;
@@ -1116,3 +1138,4 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 
 IRQCHIP_DECLARE(apple_aic, "apple,aic", aic_of_ic_init);
 IRQCHIP_DECLARE(apple_aic2, "apple,aic2", aic_of_ic_init);
+IRQCHIP_DECLARE(apple_aic3, "apple,t8122-aic3", aic_of_ic_init);

-- 
2.52.0

Re: [PATCH 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Mark Kettenis]

> From: Janne Grunau <j@jannau.net>
> Date: Sun, 25 Jan 2026 12:08:45 +0100

Hi Janne,

> 
> AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
> in its base functionality. It can use the same device tree bindings as
> AICv2 so add it to the AICv2 bindings.
> This interrupt controller is used on all Apple SoCs starting with M3 up
> to at least M5.
> The only apparent difference is the increased IRQ config offset. Apple's
> device tree codes this new offset as property of the "aic" node but the
> value stayed constant for all SoCs with "aic,3". Since the SoC specific
> compatible "apple,t8122-aic3" will be used in the driver this offset can
> remain a driver implementation detail.
> 
> Signed-off-by: Janne Grunau <j@jannau.net>
> ---
>  .../bindings/interrupt-controller/apple,aic2.yaml  | 29 +++++++++++++++-------
>  1 file changed, 20 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> index ee5a0dfff437816056bda0de5523bf38be4f49ba..933e134d82bb599a68707ba34e04ea55d61050b9 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> @@ -4,10 +4,10 @@
>  $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: Apple Interrupt Controller 2
> +title: Apple Interrupt Controller 2 and 3
>  
>  maintainers:
> -  - Hector Martin <marcan@marcan.st>
> +  - Janne Grunau <j@jannau.net>
>  
>  description: |
>    The Apple Interrupt Controller 2 is a simple interrupt controller present on
> @@ -28,14 +28,23 @@ description: |
>    which do not go through a discrete interrupt controller. It also handles
>    FIQ-based Fast IPIs.
>  
> +  The Apple Interrupt Controller 3 is in its base functionality very similar to
> +  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
> +  found on Apple ARM SoCs platforms starting with t8122 (M3).
> +
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - apple,t8112-aic
> -          - apple,t6000-aic
> -          - apple,t6020-aic
> -      - const: apple,aic2
> +    oneOf:
> +      - items:
> +          - enum:
> +              - apple,t8112-aic
> +              - apple,t6000-aic
> +              - apple,t6020-aic
> +          - const: apple,aic2
> +      - items:
> +          - enum:
> +              - apple,t6030-aic3
> +          - const: apple,t8122-aic3

I think this is missing a

         - const: apple,t8122-aic3

otherwise, the non-{Pro/Ultra/Max} M3 can't have the simple

    compatible = "apple,t8122-aic3"

>  
>    interrupt-controller: true
>  
> @@ -117,7 +126,9 @@ allOf:
>        properties:
>          compatible:
>            contains:
> -            const: apple,t8112-aic
> +            enum:
> +              - apple,t8112-aic
> +              - apple,t8122-aic3
>      then:
>        properties:
>          '#interrupt-cells':
> 
> -- 
> 2.52.0
> 
> 
> 

Re: [PATCH 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3"

[Sven Peter]

On 25.01.26 12:08, Janne Grunau wrote:
> Introduce support for the new AICv3 hardware block in t8122 and t603x
> SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset.
> These MMIO offsets are coded as properties of the "aic,3" node in
> Apple's device tree. The actual offsets are the same for all SoCs
> starting from M3 through at least M5. So do not bother to follow suit
> but use AICv3 specific defines in the driver.
> The compatible string is SoC specific so future SoCs with AICv3 and
> different offsets would just use their own compatible string as base and
> add their new offsets.
> 
> Signed-off-by: Janne Grunau <j@jannau.net>
> ---
>   drivers/irqchip/irq-apple-aic.c | 27 +++++++++++++++++++++++++--
>   1 file changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
> index 3c70364e7cddd6ed6285595f136146ab04b897b2..f4efc325bebad1ae6119aa4eab47819a267da207 100644
> --- a/drivers/irqchip/irq-apple-aic.c
> +++ b/drivers/irqchip/irq-apple-aic.c
> @@ -54,6 +54,7 @@
>   #include <linux/irqdomain.h>
>   #include <linux/jump_label.h>
>   #include <linux/limits.h>
> +#include <linux/of.h>

Did we miss this include previously or why is it added now?

Looks good to me otherwise:

Reviewed-by: Sven Peter <sven@kernel.org>


Best,


Sven

Re: [PATCH 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Janne Grunau]

On Sun, Jan 25, 2026 at 12:35:48PM +0100, Mark Kettenis wrote:
> > From: Janne Grunau <j@jannau.net>
> > Date: Sun, 25 Jan 2026 12:08:45 +0100
> 
> Hi Janne,
> 
> > 
> > AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
> > in its base functionality. It can use the same device tree bindings as
> > AICv2 so add it to the AICv2 bindings.
> > This interrupt controller is used on all Apple SoCs starting with M3 up
> > to at least M5.
> > The only apparent difference is the increased IRQ config offset. Apple's
> > device tree codes this new offset as property of the "aic" node but the
> > value stayed constant for all SoCs with "aic,3". Since the SoC specific
> > compatible "apple,t8122-aic3" will be used in the driver this offset can
> > remain a driver implementation detail.
> > 
> > Signed-off-by: Janne Grunau <j@jannau.net>
> > ---
> >  .../bindings/interrupt-controller/apple,aic2.yaml  | 29 +++++++++++++++-------
> >  1 file changed, 20 insertions(+), 9 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> > index ee5a0dfff437816056bda0de5523bf38be4f49ba..933e134d82bb599a68707ba34e04ea55d61050b9 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> > @@ -4,10 +4,10 @@
> >  $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
> >  $schema: http://devicetree.org/meta-schemas/core.yaml#
> >  
> > -title: Apple Interrupt Controller 2
> > +title: Apple Interrupt Controller 2 and 3
> >  
> >  maintainers:
> > -  - Hector Martin <marcan@marcan.st>
> > +  - Janne Grunau <j@jannau.net>
> >  
> >  description: |
> >    The Apple Interrupt Controller 2 is a simple interrupt controller present on
> > @@ -28,14 +28,23 @@ description: |
> >    which do not go through a discrete interrupt controller. It also handles
> >    FIQ-based Fast IPIs.
> >  
> > +  The Apple Interrupt Controller 3 is in its base functionality very similar to
> > +  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
> > +  found on Apple ARM SoCs platforms starting with t8122 (M3).
> > +
> >  properties:
> >    compatible:
> > -    items:
> > -      - enum:
> > -          - apple,t8112-aic
> > -          - apple,t6000-aic
> > -          - apple,t6020-aic
> > -      - const: apple,aic2
> > +    oneOf:
> > +      - items:
> > +          - enum:
> > +              - apple,t8112-aic
> > +              - apple,t6000-aic
> > +              - apple,t6020-aic
> > +          - const: apple,aic2
> > +      - items:
> > +          - enum:
> > +              - apple,t6030-aic3
> > +          - const: apple,t8122-aic3
> 
> I think this is missing a
> 
>          - const: apple,t8122-aic3
> 
> otherwise, the non-{Pro/Ultra/Max} M3 can't have the simple
> 
>     compatible = "apple,t8122-aic3"

indeed, I forgot to copy my t8122 device tree over when I ran dtbs_check
before submission. Fixed locally and I added a apple,t8122-aic3 example
which tests the #interrupt-cells 3 case

Thanks

Janne

Re: [PATCH 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3"

[Janne Grunau]

On Sun, Jan 25, 2026 at 12:42:38PM +0100, Sven Peter wrote:
> On 25.01.26 12:08, Janne Grunau wrote:
> > Introduce support for the new AICv3 hardware block in t8122 and t603x
> > SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset.
> > These MMIO offsets are coded as properties of the "aic,3" node in
> > Apple's device tree. The actual offsets are the same for all SoCs
> > starting from M3 through at least M5. So do not bother to follow suit
> > but use AICv3 specific defines in the driver.
> > The compatible string is SoC specific so future SoCs with AICv3 and
> > different offsets would just use their own compatible string as base and
> > add their new offsets.
> > 
> > Signed-off-by: Janne Grunau <j@jannau.net>
> > ---
> >   drivers/irqchip/irq-apple-aic.c | 27 +++++++++++++++++++++++++--
> >   1 file changed, 25 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
> > index 3c70364e7cddd6ed6285595f136146ab04b897b2..f4efc325bebad1ae6119aa4eab47819a267da207 100644
> > --- a/drivers/irqchip/irq-apple-aic.c
> > +++ b/drivers/irqchip/irq-apple-aic.c
> > @@ -54,6 +54,7 @@
> >   #include <linux/irqdomain.h>
> >   #include <linux/jump_label.h>
> >   #include <linux/limits.h>
> > +#include <linux/of.h>
> 
> Did we miss this include previously or why is it added now?

It's a leftover from my initial (unsend) version which read MMIO offsets
from node properties.

It was strictly speaking missing though as the driver uses multiple
functions from it. On the other hand it is probably safe to assume that
of_address.h will include it implicity. I can remove this line from the
as it is confusing adding it without apparent reason.

Janne

Re: [PATCH 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3"

[Thomas Gleixner]

On Sun, Jan 25 2026 at 12:08, Janne Grunau wrote:
> +/*
> + * AIC v3 registers (MMIO)
> + */
> + 

Pointless newline and please make this a /* Oneline comment */

> +#define AIC3_IRQ_CFG		0x10000
> +
>  	}
> +	case 3:
>  	case 2: {

1 3 2 is a weird count order...

Thanks,

        tglx

Re: [PATCH 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3"

[Janne Grunau]

On Mon, Jan 26, 2026 at 04:52:06PM +0100, Thomas Gleixner wrote:
> On Sun, Jan 25 2026 at 12:08, Janne Grunau wrote:
> > +/*
> > + * AIC v3 registers (MMIO)
> > + */
> > + 
> 
> Pointless newline and please make this a /* Oneline comment */

copy-n-pasted from AICv2 (and AICv1) above, changed locally for v2

> > +#define AIC3_IRQ_CFG		0x10000
> > +
> >  	}
> > +	case 3:
> >  	case 2: {
> 
> 1 3 2 is a weird count order...

version 3 was using a fall-through in the intial version so the order
made sense then. Change locally to 'case 2 ... 3:'

Janne