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From: Marc Zyngier <maz@kernel.org>
To: Jing Zhang <jingzhangos@google.com>
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Eric Auger <eric.auger@redhat.com>,
	Mark Brown <broonie@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Chase Conklin <chase.conklin@arm.com>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	Darren Hart <darren@os.amperecomputing.com>,
	Miguel Luis <miguel.luis@oracle.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH v3 19/27] KVM: arm64: nv: Add fine grained trap forwarding infrastructure
Date: Tue, 15 Aug 2023 11:39:34 +0100	[thread overview]
Message-ID: <87fs4kpp21.wl-maz@kernel.org> (raw)
In-Reply-To: <CAAdAUtiaewy_xAnS2gm-6YhOq=ednvj0_VO=Ld4+UY+9E5BF8w@mail.gmail.com>

On Mon, 14 Aug 2023 18:18:57 +0100,
Jing Zhang <jingzhangos@google.com> wrote:
> 
> Hi Marc,
> 
> On Tue, Aug 8, 2023 at 4:47 AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > Fine Grained Traps are fun. Not.
> >
> > Implement the fine grained trap forwarding, reusing the Coarse Grained
> > Traps infrastructure previously implemented.
> >
> > Each sysreg/instruction inserted in the xarray gets a FGT group
> > (vaguely equivalent to a register number), a bit number in that register,
> > and a polarity.
> >
> > It is then pretty easy to check the FGT state at handling time, just
> > like we do for the coarse version (it is just faster).
> >
> > Reviewed-by: Eric Auger <eric.auger@redhat.com>
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  arch/arm64/kvm/emulate-nested.c | 78 ++++++++++++++++++++++++++++++++-
> >  1 file changed, 77 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
> > index cd0544c3577e..af75c2775638 100644
> > --- a/arch/arm64/kvm/emulate-nested.c
> > +++ b/arch/arm64/kvm/emulate-nested.c
> > @@ -928,6 +928,27 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {
> >
> >  static DEFINE_XARRAY(sr_forward_xa);
> >
> > +enum fgt_group_id {
> > +       __NO_FGT_GROUP__,
> > +
> > +       /* Must be last */
> > +       __NR_FGT_GROUP_IDS__
> > +};
> > +
> > +#define SR_FGT(sr, g, b, p)                                    \
> > +       {                                                       \
> > +               .encoding       = sr,                           \
> > +               .end            = sr,                           \
> > +               .tc             = {                             \
> > +                       .fgt = g ## _GROUP,                     \
> > +                       .bit = g ## _EL2_ ## b ## _SHIFT,       \
> > +                       .pol = p,                               \
> > +               },                                              \
> > +       }
> > +
> > +static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {
> > +};
> > +
> >  static union trap_config get_trap_config(u32 sysreg)
> >  {
> >         return (union trap_config) {
> > @@ -941,6 +962,7 @@ int __init populate_nv_trap_config(void)
> >
> >         BUILD_BUG_ON(sizeof(union trap_config) != sizeof(void *));
> >         BUILD_BUG_ON(__NR_TRAP_GROUP_IDS__ > BIT(TC_CGT_BITS));
> > +       BUILD_BUG_ON(__NR_FGT_GROUP_IDS__ > BIT(TC_FGT_BITS));
> >
> >         for (int i = 0; i < ARRAY_SIZE(encoding_to_cgt); i++) {
> >                 const struct encoding_to_trap_config *cgt = &encoding_to_cgt[i];
> > @@ -963,6 +985,34 @@ int __init populate_nv_trap_config(void)
> >         kvm_info("nv: %ld coarse grained trap handlers\n",
> >                  ARRAY_SIZE(encoding_to_cgt));
> >
> > +       if (!cpus_have_final_cap(ARM64_HAS_FGT))
> > +               goto check_mcb;
> > +
> > +       for (int i = 0; i < ARRAY_SIZE(encoding_to_fgt); i++) {
> > +               const struct encoding_to_trap_config *fgt = &encoding_to_fgt[i];
> > +               union trap_config tc;
> > +
> > +               tc = get_trap_config(fgt->encoding);
> > +
> > +               if (tc.fgt) {
> > +                       kvm_err("Duplicate FGT for (%d, %d, %d, %d, %d)\n",
> > +                               sys_reg_Op0(fgt->encoding),
> > +                               sys_reg_Op1(fgt->encoding),
> > +                               sys_reg_CRn(fgt->encoding),
> > +                               sys_reg_CRm(fgt->encoding),
> > +                               sys_reg_Op2(fgt->encoding));
> > +                       ret = -EINVAL;
> > +               }
> > +
> > +               tc.val |= fgt->tc.val;
> > +               xa_store(&sr_forward_xa, fgt->encoding,
> > +                        xa_mk_value(tc.val), GFP_KERNEL);
> > +       }
> > +
> > +       kvm_info("nv: %ld fine grained trap handlers\n",
> > +                ARRAY_SIZE(encoding_to_fgt));
> > +
> > +check_mcb:
> >         for (int id = __MULTIPLE_CONTROL_BITS__;
> >              id < (__COMPLEX_CONDITIONS__ - 1);
> >              id++) {
> > @@ -1031,13 +1081,26 @@ static enum trap_behaviour compute_trap_behaviour(struct kvm_vcpu *vcpu,
> >         return __do_compute_trap_behaviour(vcpu, tc.cgt, b);
> >  }
> >
> > +static bool check_fgt_bit(u64 val, const union trap_config tc)
> > +{
> > +       return ((val >> tc.bit) & 1) == tc.pol;
> > +}
> > +
> > +#define sanitised_sys_reg(vcpu, reg)                   \
> > +       ({                                              \
> > +               u64 __val;                              \
> > +               __val = __vcpu_sys_reg(vcpu, reg);      \
> > +               __val &= ~__ ## reg ## _RES0;           \
> > +               (__val);                                \
> > +       })
> > +
> >  bool __check_nv_sr_forward(struct kvm_vcpu *vcpu)
> >  {
> >         union trap_config tc;
> >         enum trap_behaviour b;
> >         bool is_read;
> >         u32 sysreg;
> > -       u64 esr;
> > +       u64 esr, val;
> >
> >         if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))
> >                 return false;
> > @@ -1060,6 +1123,19 @@ bool __check_nv_sr_forward(struct kvm_vcpu *vcpu)
> >         if (!tc.val)
> >                 return false;
> >
> > +       switch ((enum fgt_group_id)tc.fgt) {
> > +       case __NO_FGT_GROUP__:
> > +               break;
> > +
> > +       case __NR_FGT_GROUP_IDS__:
> > +               /* Something is really wrong, bail out */
> > +               WARN_ONCE(1, "__NR_FGT_GROUP_IDS__");
> > +               return false;
> 
> Do we need a default clause here to catch unexpected tc.fgt values?

I'd rather not have anything special at handling time, as the compiler
is perfectly allowed to use the cast above to restrict the value to
the enumeration. We already cover all the possible enum values, which
is good enough.

However, I've added an extra check at boot time for unexpected values
having sneaked into the FGT table.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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  reply	other threads:[~2023-08-15 10:39 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-08 11:46 [PATCH v3 00/27] KVM: arm64: NV trap forwarding infrastructure Marc Zyngier
2023-08-08 11:46 ` [PATCH v3 01/27] arm64: Add missing VA CMO encodings Marc Zyngier
2023-08-10  3:14   ` Jing Zhang
2023-08-15 10:39     ` Marc Zyngier
2023-08-08 11:46 ` [PATCH v3 02/27] arm64: Add missing ERX*_EL1 encodings Marc Zyngier
2023-08-10  4:25   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 03/27] arm64: Add missing DC ZVA/GVA/GZVA encodings Marc Zyngier
2023-08-10  4:29   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 04/27] arm64: Add TLBI operation encodings Marc Zyngier
2023-08-10  5:22   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 05/27] arm64: Add AT " Marc Zyngier
2023-08-11  2:20   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 06/27] arm64: Add debug registers affected by HDFGxTR_EL2 Marc Zyngier
2023-08-11  3:00   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 07/27] arm64: Add missing BRB/CFP/DVP/CPP instructions Marc Zyngier
2023-08-11  3:07   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 08/27] arm64: Add HDFGRTR_EL2 and HDFGWTR_EL2 layouts Marc Zyngier
2023-08-11  3:19   ` Jing Zhang
2023-08-14 12:32   ` Eric Auger
2023-08-08 11:46 ` [PATCH v3 09/27] arm64: Add feature detection for fine grained traps Marc Zyngier
2023-08-11 15:26   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 10/27] KVM: arm64: Correctly handle ACCDATA_EL1 traps Marc Zyngier
2023-08-11 15:31   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 11/27] KVM: arm64: Add missing HCR_EL2 trap bits Marc Zyngier
2023-08-11 16:21   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 12/27] KVM: arm64: nv: Add FGT registers Marc Zyngier
2023-08-11 16:36   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 13/27] KVM: arm64: Restructure FGT register switching Marc Zyngier
2023-08-11 17:40   ` Jing Zhang
2023-08-08 11:46 ` [PATCH v3 14/27] KVM: arm64: nv: Add trap forwarding infrastructure Marc Zyngier
2023-08-09 13:27   ` Eric Auger
2023-08-10 14:44     ` Marc Zyngier
2023-08-10 17:34       ` Eric Auger
2023-08-09 18:28   ` Miguel Luis
2023-08-10 14:43     ` Marc Zyngier
2023-08-13  2:24   ` Jing Zhang
2023-08-15 10:38     ` Marc Zyngier
2023-08-08 11:46 ` [PATCH v3 15/27] KVM: arm64: nv: Add trap forwarding for HCR_EL2 Marc Zyngier
2023-08-12  3:08   ` Miguel Luis
2023-08-15 10:39     ` Marc Zyngier
2023-08-15 15:35       ` Miguel Luis
2023-08-15 16:07         ` Marc Zyngier
2023-08-15 15:46   ` Miguel Luis
2023-08-15 16:09     ` Marc Zyngier
2023-08-08 11:47 ` [PATCH v3 16/27] KVM: arm64: nv: Expose FEAT_EVT to nested guests Marc Zyngier
2023-08-14 21:08   ` Jing Zhang
2023-08-08 11:47 ` [PATCH v3 17/27] KVM: arm64: nv: Add trap forwarding for MDCR_EL2 Marc Zyngier
2023-08-08 11:47 ` [PATCH v3 18/27] KVM: arm64: nv: Add trap forwarding for CNTHCTL_EL2 Marc Zyngier
2023-08-08 11:47 ` [PATCH v3 19/27] KVM: arm64: nv: Add fine grained trap forwarding infrastructure Marc Zyngier
2023-08-14 17:18   ` Jing Zhang
2023-08-15 10:39     ` Marc Zyngier [this message]
2023-08-08 11:47 ` [PATCH v3 20/27] KVM: arm64: nv: Add trap forwarding for HFGxTR_EL2 Marc Zyngier
2023-08-08 11:47 ` [PATCH v3 21/27] KVM: arm64: nv: Add trap forwarding for HFGITR_EL2 Marc Zyngier
2023-08-08 11:47 ` [PATCH v3 22/27] KVM: arm64: nv: Add trap forwarding for HDFGxTR_EL2 Marc Zyngier
2023-08-08 12:30   ` Eric Auger
2023-08-08 11:47 ` [PATCH v3 23/27] KVM: arm64: nv: Add SVC trap forwarding Marc Zyngier
2023-08-10  8:35   ` Eric Auger
2023-08-10 10:42     ` Marc Zyngier
2023-08-10 17:30       ` Eric Auger
2023-08-11  7:36         ` Marc Zyngier
2023-08-14  9:37           ` Eric Auger
2023-08-14  9:37   ` Eric Auger
2023-08-08 11:47 ` [PATCH v3 24/27] KVM: arm64: nv: Add switching support for HFGxTR/HDFGxTR Marc Zyngier
2023-08-10  8:59   ` Eric Auger
2023-08-08 11:47 ` [PATCH v3 25/27] KVM: arm64: nv: Expose FGT to nested guests Marc Zyngier
2023-08-10  9:44   ` Eric Auger
2023-08-08 11:47 ` [PATCH v3 26/27] KVM: arm64: Move HCRX_EL2 switch to load/put on VHE systems Marc Zyngier
2023-08-10 12:38   ` Eric Auger
2023-08-08 11:47 ` [PATCH v3 27/27] KVM: arm64: nv: Add support for HCRX_EL2 Marc Zyngier
2023-08-14 12:17   ` Eric Auger

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