Does clocksource arch_sys_counter synchronize across CPUs?

Does clocksource arch_sys_counter synchronize across CPUs?

[Huichun Feng]

Hi list,

AFAIK, one of the clocksource in arm64 (armv8.3, Rpi4) --
arch_sys_counter, uses a per-core register CNTVCT as the accessor.

And comes to consistency of CNTVCT's, after searching some of the
related manuals [0-2], I didn't find statements saying that it is
synchronize across CPUs. However, I've found a recent patch [3] says
that CNTVCT is synchronized in armv8.6.

So, does CNTVCT synchronize across CPUs in armv8.3?

thanks.
Huichun

[0] https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf
[1] https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/System-registers
[2] https://developer.arm.com/documentation/102379/0000/The-processor-timers?lang=en
[3] https://www.spinics.net/lists/arm-kernel/msg934605.html

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: Does clocksource arch_sys_counter synchronize across CPUs?

[Marc Zyngier]

On Mon, 10 Jan 2022 16:51:14 +0000,
Huichun Feng <foxhoundsk.tw@gmail.com> wrote:
> 
> Hi list,
> 
> AFAIK, one of the clocksource in arm64 (armv8.3, Rpi4) --

RPI4 is ARMv8.0 (not that it matters here).

> arch_sys_counter, uses a per-core register CNTVCT as the accessor.
> 
> And comes to consistency of CNTVCT's, after searching some of the
> related manuals [0-2], I didn't find statements saying that it is
> synchronize across CPUs. However, I've found a recent patch [3] says
> that CNTVCT is synchronized in armv8.6.
> 
> So, does CNTVCT synchronize across CPUs in armv8.3?

CNTVCT_EL0 is guaranteed to be identical across CPUs as long as
CNTVOFF_EL2 is identical across CPUs. That's because all the CPUs
source their counters from the same source (see the architecture spec
in section D11 for the details).

The patch you mention makes use of the *self-synchronisation* feature
of the CNTVCTSS_EL0 instruction. which guarantees that the instruction
won't be reordered wrt to other instructions in the stream, avoiding
the use of an ISB instruction. Nothing to do with cross-CPU
synchronisation, which has always been guaranteed (there are broken
system integrations though).

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel