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[95.217.157.248]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549441740ffsm466848e87.50.2025.02.28.03.43.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Feb 2025 03:43:31 -0800 (PST) References: <20250128-b4-rkisp-noncoherent-v3-0-baf39c997d2a@gmail.com> <20250128-b4-rkisp-noncoherent-v3-1-baf39c997d2a@gmail.com> <25beec7ea929b624d845f5ba4abce6267974ed82.camel@ndufresne.ca> User-agent: mu4e 1.10.9; emacs 29.4.50 From: Mikhail Rudenko To: Tomasz Figa Cc: Nicolas Dufresne , Dafna Hirschfeld , Laurent Pinchart , Mauro Carvalho Chehab , Heiko Stuebner , Marek Szyprowski , Hans Verkuil , Sergey Senozhatsky , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mauro Carvalho Chehab , stable@vger.kernel.org Subject: Re: [PATCH v3 1/2] media: videobuf2: Fix dmabuf cache sync/flush in dma-contig Date: Fri, 28 Feb 2025 14:41:34 +0300 In-reply-to: Message-ID: <87h64eb8gw.fsf@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250228_034334_002894_D64B1EEE X-CRM114-Status: GOOD ( 30.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2025-02-28 at 19:25 +09, Tomasz Figa wrote: > On Fri, Feb 28, 2025 at 12:30=E2=80=AFPM Nicolas Dufresne wrote: >> >> Le mardi 28 janvier 2025 =C3=A0 23:35 +0300, Mikhail Rudenko a =C3=A9cri= t : >> > When support for V4L2_FLAG_MEMORY_NON_CONSISTENT was removed in >> > commit 129134e5415d ("media: media/v4l2: remove >> > V4L2_FLAG_MEMORY_NON_CONSISTENT flag"), >> > vb2_dc_dmabuf_ops_{begin,end}_cpu_access() functions were made >> > no-ops. Later, when support for V4L2_MEMORY_FLAG_NON_COHERENT was >> > introduced in commit c0acf9cfeee0 ("media: videobuf2: handle >> > V4L2_MEMORY_FLAG_NON_COHERENT flag"), the above functions remained >> > no-ops, making cache maintenance for non-coherent dmabufs allocated >> > by >> > dma-contig impossible. >> > >> > Fix this by reintroducing dma_sync_sgtable_for_{cpu,device} and >> > {flush,invalidate}_kernel_vmap_range calls to >> > vb2_dc_dmabuf_ops_{begin,end}_cpu_access() functions for non-coherent >> > buffers. >> > >> > Fixes: c0acf9cfeee0 ("media: videobuf2: handle >> > V4L2_MEMORY_FLAG_NON_COHERENT flag") >> > Cc: stable@vger.kernel.org >> > Signed-off-by: Mikhail Rudenko >> > --- >> > .../media/common/videobuf2/videobuf2-dma-contig.c | 22 >> > ++++++++++++++++++++++ >> > 1 file changed, 22 insertions(+) >> > >> > diff --git a/drivers/media/common/videobuf2/videobuf2-dma-contig.c >> > b/drivers/media/common/videobuf2/videobuf2-dma-contig.c >> > index >> > bb0b7fa67b539aa73ad5ccf3c3bc318e26f8a4cb..146d7997a0da5989fb081a6f28c >> > e0641fe726e63 100644 >> > --- a/drivers/media/common/videobuf2/videobuf2-dma-contig.c >> > +++ b/drivers/media/common/videobuf2/videobuf2-dma-contig.c >> > @@ -427,6 +427,17 @@ static int >> > vb2_dc_dmabuf_ops_begin_cpu_access(struct dma_buf *dbuf, >> > enum dma_data_direction >> > direction) >> > { >> > + struct vb2_dc_buf *buf =3D dbuf->priv; >> > + struct sg_table *sgt =3D buf->dma_sgt; >> > + >> > + if (!buf->non_coherent_mem) >> > + return 0; >> > + >> > + if (buf->vaddr) >> > + invalidate_kernel_vmap_range(buf->vaddr, buf->size); >> >> Am I correct that this is mostly to prevent the kernel from reading >> back old data from the cache after an application or other driver did >> CPU writes ? If so, can't we restrict that to DMA_TO_DEVICE and >> DMA_BIDIRECTIONAL ? > > Note that this function must also synchronize between the user-space > and kernel mappings, where the DMA direction doesn't really matter. > Also it's unlikely for it to be called when not needed - why would one > begin a CPU access before the DMA, when the DMA is FROM_DEVICE? > >> >> As for pending kernel writes, they should have been flushed before the >> buffer is made available for dequeue. > > There is no implicit flushing for imported DMA-bufs. All the flushing > needs to be executed directly by the CPU accessors by surrounding the > access with begin and end CPU access, be it in the kernel or > userspace. > >> And any access while a buffer is >> queued is concurrent access, which is expected to have undefined >> behaviour. >> > > Correct. > >> > + >> > + dma_sync_sgtable_for_cpu(buf->dev, sgt, buf->dma_dir); >> >> Isn't there a link to make between buf->dma_dir and direcction before >> calling this ? Also, shouldn't we use direction insead of buf->dma_dir >> to possibly limit the scope ? > > Oh, yes, that's a good catch. Indeed, will fix this in v4. > It should be |direction| passed here and > not |buf->dma_dir|, since the former determines what CPU access will > be done. > >> >> > + >> > return 0; >> > } >> > >> > @@ -434,6 +445,17 @@ static int >> > vb2_dc_dmabuf_ops_end_cpu_access(struct dma_buf *dbuf, >> > enum dma_data_direction direction) >> > { >> > + struct vb2_dc_buf *buf =3D dbuf->priv; >> > + struct sg_table *sgt =3D buf->dma_sgt; >> > + >> > + if (!buf->non_coherent_mem) >> > + return 0; >> > + >> > + if (buf->vaddr) >> > + flush_kernel_vmap_range(buf->vaddr, buf->size); >> > + >> > + dma_sync_sgtable_for_device(buf->dev, sgt, buf->dma_dir); >> >> Similar questions for the end_cpu_access implementation. > > Yeah, same here. Noted, will fix. >> >> Nicolas >> >> > + >> > return 0; >> > } >> > >> > >> -- Best regards, Mikhail Rudenko