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Wed, 30 Oct 2024 08:45:53 +0000 Date: Wed, 30 Oct 2024 08:45:48 +0000 Message-ID: <87h68ut1vn.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Anshuman Khandual , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 00/18] KVM: arm64: nv: Support for EL2 PMU controls In-Reply-To: <20241025182354.3364124-1-oliver.upton@linux.dev> References: <20241025182354.3364124-1-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 82.132.233.180 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241030_014557_074078_782A5008 X-CRM114-Status: GOOD ( 16.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 25 Oct 2024 19:23:35 +0100, Oliver Upton wrote: > > v3 -> v4: > - Align sysreg definitions with DDI0601 2024-09 > - Fix 'accessible' counter mask construction > - Fix MDCR_EL2.MTPME RES0 logic > > v3: https://lore.kernel.org/kvmarm/20241007174559.1830205-1-oliver.upton@linux.dev/ > > Marc Zyngier (1): > KVM: arm64: Extend masking facility to arbitrary registers > > Oliver Upton (17): > arm64: sysreg: Describe ID_AA64DFR2_EL1 fields > arm64: sysreg: Migrate MDCR_EL2 definition to table > arm64: sysreg: Add new definitions for ID_AA64DFR0_EL1 > KVM: arm64: Describe RES0/RES1 bits of MDCR_EL2 > KVM: arm64: nv: Allow coarse-grained trap combos to use complex traps > KVM: arm64: nv: Rename BEHAVE_FORWARD_ANY > KVM: arm64: nv: Reinject traps that take effect in Host EL0 > KVM: arm64: nv: Honor MDCR_EL2.{TPM, TPMCR} in Host EL0 > KVM: arm64: nv: Describe trap behaviour of MDCR_EL2.HPMN > KVM: arm64: nv: Advertise support for FEAT_HPMN0 > KVM: arm64: Rename kvm_pmu_valid_counter_mask() > KVM: arm64: nv: Adjust range of accessible PMCs according to HPMN > KVM: arm64: Add helpers to determine if PMC counts at a given EL > KVM: arm64: nv: Honor MDCR_EL2.HPME > KVM: arm64: nv: Honor MDCR_EL2.HLP > KVM: arm64: nv: Apply EL2 event filtering when in hyp context > KVM: arm64: nv: Reprogram PMU events affected by nested transition > > arch/arm64/include/asm/kvm_arm.h | 29 --- > arch/arm64/include/asm/kvm_emulate.h | 5 + > arch/arm64/include/asm/kvm_host.h | 21 +- > arch/arm64/kvm/emulate-nested.c | 291 ++++++++++++++++----------- > arch/arm64/kvm/nested.c | 54 ++++- > arch/arm64/kvm/pmu-emul.c | 143 +++++++++++-- > arch/arm64/kvm/sys_regs.c | 15 +- > arch/arm64/tools/sysreg | 76 ++++++- > include/kvm/arm_pmu.h | 18 +- > 9 files changed, 465 insertions(+), 187 deletions(-) > > > base-commit: 8e929cb546ee42c9a61d24fae60605e9e3192354 I think this is pretty much good to go, and with the couple of nits mentioned before fixed: Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.