From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84CE6C27C53 for ; Sat, 22 Jun 2024 21:30:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: Message-ID:Date:References:In-Reply-To:Subject:Cc:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1KQ2EoR3wFdtA88jBwv51Wj99EFEpegqAlD2wICqBgA=; b=OWdSDmMGyhk0KR/rQJH9bbOhax FQolzBUTw4sRd+6LI30Nat8f+G6BL9nszGMzBs3fMtDG8cog/hZ1aMrpMLUmxMW++aC+umdCZ5vz/ WhT8Qg8plMJmhCAQIUHlUlLnLlA1fAmMSgOwT5qHS+uqVxUnKGVdsUhKiFbn+zs6i3E4vGh7LrF3/ UhcvhqbkPuFwWSCvFK7RQn+7TayL9Dm8lGNbDOVukwYkilwwg/v1hRc9u/AaKyBuD+3aJHNlYDVX5 EKREN9I7cBwCvzZL9jxLCGV4ZW+oyb+2mXYRs3xZyx15Ghb7LtyrPg78H4SqwTThx3XDgyvymBLaA cx2+lHmg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sL8J6-0000000CpeH-0yYp; Sat, 22 Jun 2024 21:30:00 +0000 Received: from galois.linutronix.de ([193.142.43.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sL8J0-0000000Cpd1-2Qs3 for linux-arm-kernel@lists.infradead.org; Sat, 22 Jun 2024 21:29:57 +0000 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1719091790; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=1KQ2EoR3wFdtA88jBwv51Wj99EFEpegqAlD2wICqBgA=; b=HJ6CItV/bhV2MZubgdpvd+W5le/hslxM5tQd3iSUkJgvTVMRvzVthQIa02BgGdY+NWNJWT +4LoyZgJXNJ13uqZGFq6JeLDKENQtUdLeeIkUsT0j5JhAsIcLj7fpRnn6BFfyVnUwmUqoS oON9dJ0zElu7epDqtggV4VnnL0dKOrA/BIdTAQIHbZ+WVH4qfhkVP5VmdMSns66nMDqtjY R+rCVsluHAnDaoYFbTqg+JYtjOoh/UrUmXHPVrL/apvAzW8sLyT3RDA1q9i7NxKIsCCVgW ANtwuiGyjNBkMftPHZ58o+kVHSRll1Ge5ZcpHEVZujLeUpESkFpKgY9+KYDYug== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1719091790; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=1KQ2EoR3wFdtA88jBwv51Wj99EFEpegqAlD2wICqBgA=; b=JaYvvJyVsRVexyd4EuAWuWSbRS1qscIqGsBDjFg9p4nCrn3glfVXoWH2RbcnUJf3SymR5P 5Pu+Dx+khj6+VxBg== To: Catalin Marinas , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, Will Deacon , alexandru.elisei@arm.com, linux-kernel@vger.kernel.org, maz@kernel.org Subject: Re: [PATCH v2 0/5] arm64: irqchip/gic-v3: Use compiletime constant PMR values In-Reply-To: References: <20240617111841.2529370-1-mark.rutland@arm.com> Date: Sat, 22 Jun 2024 23:29:50 +0200 Message-ID: <87h6dkzmwh.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240622_142954_787226_BDF07B6D X-CRM114-Status: GOOD ( 12.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jun 21 2024 at 18:26, Catalin Marinas wrote: > On Mon, Jun 17, 2024 at 12:18:36PM +0100, Mark Rutland wrote: >> Mark Rutland (5): >> wordpart.h: Add REPEAT_BYTE_U32() >> irqchip/gic-common: Remove sync_access callback >> irqchip/gic-v3: Make distributor priorities variables >> irqchip/gic-v3: Detect GICD_CTRL.DS and SCR_EL3.FIQ earlier >> arm64: irqchip/gic-v3: Select priorities at boot time >> >> arch/arm64/include/asm/arch_gicv3.h | 15 -- >> arch/arm64/include/asm/ptrace.h | 35 +--- >> arch/arm64/kernel/image-vars.h | 5 - >> drivers/irqchip/irq-gic-common.c | 22 +-- >> drivers/irqchip/irq-gic-common.h | 7 +- >> drivers/irqchip/irq-gic-v3-its.c | 11 +- >> drivers/irqchip/irq-gic-v3.c | 225 ++++++++++++------------ >> drivers/irqchip/irq-gic.c | 10 +- >> drivers/irqchip/irq-hip04.c | 6 +- >> include/linux/irqchip/arm-gic-common.h | 4 - >> include/linux/irqchip/arm-gic-v3-prio.h | 52 ++++++ >> include/linux/irqchip/arm-gic-v3.h | 2 +- >> include/linux/wordpart.h | 8 + >> 13 files changed, 201 insertions(+), 201 deletions(-) >> create mode 100644 include/linux/irqchip/arm-gic-v3-prio.h > > Are you ok for these patches to go through the arm64 tree (I can put > them on a stable branch) or you'd rather get them through the irqchip > tree? Either way, I don't expect (major) conflicts with the arm64 tree. Take them through your tree with my Acked-by. Yes a branch would be appreciated just in case. There is also https://lore.kernel.org/all/20240529133446.28446-1-Jonathan.Cameron@huawei.com which fiddles with the GIC but most of this is not irqchip code. No idea how that is supposed to find it's way into the tree. Thanks, tglx