Re: [PATCH v3 01/27] arm64: Add missing VA CMO encodings

From: Marc Zyngier <maz@kernel.org>
To: Jing Zhang <jingzhangos@google.com>
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Eric Auger <eric.auger@redhat.com>,
	Mark Brown <broonie@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Chase Conklin <chase.conklin@arm.com>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	Darren Hart <darren@os.amperecomputing.com>,
	Miguel Luis <miguel.luis@oracle.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH v3 01/27] arm64: Add missing VA CMO encodings
Date: Tue, 15 Aug 2023 11:39:18 +0100	[thread overview]
Message-ID: <87h6p0pp2h.wl-maz@kernel.org> (raw)
In-Reply-To: <CAAdAUtjaj7wCn6VG7KxGqmT_e+nth_LK00+4E2SfF=5dFpmbSA@mail.gmail.com>

On Thu, 10 Aug 2023 04:14:51 +0100,
Jing Zhang <jingzhangos@google.com> wrote:
> 
> Hi Marc,
> 
> On Tue, Aug 8, 2023 at 4:47 AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > Add the missing VA-based CMOs encodings.
> >
> > Reviewed-by: Eric Auger <eric.auger@redhat.com>
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > Reviewed-by: Miguel Luis <miguel.luis@oracle.com>
> > Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> > Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
> > ---
> >  arch/arm64/include/asm/sysreg.h | 26 ++++++++++++++++++++++++++
> >  1 file changed, 26 insertions(+)
> >
> > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > index b481935e9314..85447e68951a 100644
> > --- a/arch/arm64/include/asm/sysreg.h
> > +++ b/arch/arm64/include/asm/sysreg.h
> > @@ -124,6 +124,32 @@
> >  #define SYS_DC_CIGSW                   sys_insn(1, 0, 7, 14, 4)
> >  #define SYS_DC_CIGDSW                  sys_insn(1, 0, 7, 14, 6)
> >
> > +#define SYS_IC_IALLUIS                 sys_insn(1, 0, 7, 1, 0)
> > +#define SYS_IC_IALLU                   sys_insn(1, 0, 7, 5, 0)
> > +#define SYS_IC_IVAU                    sys_insn(1, 3, 7, 5, 1)
> > +
> > +#define SYS_DC_IVAC                    sys_insn(1, 0, 7, 6, 1)
> > +#define SYS_DC_IGVAC                   sys_insn(1, 0, 7, 6, 3)
> > +#define SYS_DC_IGDVAC                  sys_insn(1, 0, 7, 6, 5)
> > +
> > +#define SYS_DC_CVAC                    sys_insn(1, 3, 7, 10, 1)
> > +#define SYS_DC_CGVAC                   sys_insn(1, 3, 7, 10, 3)
> > +#define SYS_DC_CGDVAC                  sys_insn(1, 3, 7, 10, 5)
> > +
> > +#define SYS_DC_CVAU                    sys_insn(1, 3, 7, 11, 1)
> > +
> > +#define SYS_DC_CVAP                    sys_insn(1, 3, 7, 12, 1)
> > +#define SYS_DC_CGVAP                   sys_insn(1, 3, 7, 12, 3)
> > +#define SYS_DC_CGDVAP                  sys_insn(1, 3, 7, 12, 5)
> > +
> > +#define SYS_DC_CVADP                   sys_insn(1, 3, 7, 13, 1)
> > +#define SYS_DC_CGVADP                  sys_insn(1, 3, 7, 13, 3)
> > +#define SYS_DC_CGDVADP                 sys_insn(1, 3, 7, 13, 5)
> > +
> > +#define SYS_DC_CIVAC                   sys_insn(1, 3, 7, 14, 1)
> > +#define SYS_DC_CIGVAC                  sys_insn(1, 3, 7, 14, 3)
> > +#define SYS_DC_CIGDVAC                 sys_insn(1, 3, 7, 14, 5)
> > +
> 
> How about sorting these new ones with existing ones to make it more readable?
> Otherwise,
> Reviewed-by: Jing Zhang <jingzhangos@google.com>

Do you mean the DC SW ops? I'd rather keep them separated, as their
encoding has a different pattern, and they are treated pretty
differently. I found that mixing them with the rest of the DC ops made
it *more* difficult to figure out what we were dealing with.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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