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From: Frank Oltmanns <frank@oltmanns.dev>
To: Roman Beranek <me@crly.cz>
Cc: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] drm: sun4i: calculate proper DCLK rate for DSI
Date: Sun, 02 Apr 2023 12:49:08 +0200	[thread overview]
Message-ID: <87h6tya70h.fsf@oltmanns.dev> (raw)
In-Reply-To: <20230331110245.43527-4-me@crly.cz>

Hi Roman,

On 2023-03-31 at 13:02:45 +0200, Roman Beranek <me@crly.cz> wrote:
> In DSI mode, TCON0's data clock is required to run at 1/4 the per-lane
> bit rate.
>
> Signed-off-by: Roman Beranek <me@crly.cz>
> ---
>  drivers/gpu/drm/sun4i/sun4i_tcon.c | 36 +++++++++++++++++-------------
>  1 file changed, 21 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index eec26b1faa4b..b263de7a8237 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> @@ -291,18 +291,6 @@ static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode,
>  	return delay;
>  }
>
> -static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon,
> -					const struct drm_display_mode *mode)
> -{
> -	/* Configure the dot clock */
> -	clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
> -
> -	/* Set the resolution */
> -	regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> -		     SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> -		     SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
> -}
> -
>  static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
>  					   const struct drm_connector *connector)
>  {
> @@ -367,10 +355,18 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon,
>  	u32 block_space, start_delay;
>  	u32 tcon_div;
>
> +	/*
> +	 * dclk is required to run at 1/4 the DSI per-lane bit rate.
> +	 */
>  	tcon->dclk_min_div = SUN6I_DSI_TCON_DIV;
>  	tcon->dclk_max_div = SUN6I_DSI_TCON_DIV;
> +	clk_set_rate(tcon->dclk, mode->crtc_clock * 1000 * (bpp / lanes)
> +						  / SUN6I_DSI_TCON_DIV);

When apply this to drm-next my panel stays dark. I haven't figured out
yet why, though. The other two patches in this series work fine, i.e.
they have no effect as they are just a refactoring.

I'm testing this on my pinephone. It's the same with the patch I
submitted. For whatever reason, it no longer works on drm-next.

At the time I'm writing this, drm-next is at 82bbec189ab3 "Merge
v6.3-rc4 into drm-next".

Does it work for you? And if so, on which commit are you basing this
series?

Thanks,
  Frank


>
> -	sun4i_tcon0_mode_set_common(tcon, mode);
> +	/* Set the resolution */
> +	regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> +		     SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> +		     SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
>
>  	/* Set dithering if needed */
>  	sun4i_tcon0_mode_set_dithering(tcon, sun4i_tcon_get_connector(encoder));
> @@ -438,7 +434,12 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
>
>  	tcon->dclk_min_div = 7;
>  	tcon->dclk_max_div = 7;
> -	sun4i_tcon0_mode_set_common(tcon, mode);
> +	clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
> +
> +	/* Set the resolution */
> +	regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> +		     SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> +		     SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
>
>  	/* Set dithering if needed */
>  	sun4i_tcon0_mode_set_dithering(tcon, sun4i_tcon_get_connector(encoder));
> @@ -515,7 +516,12 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
>
>  	tcon->dclk_min_div = tcon->quirks->dclk_min_div;
>  	tcon->dclk_max_div = 127;
> -	sun4i_tcon0_mode_set_common(tcon, mode);
> +	clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
> +
> +	/* Set the resolution */
> +	regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> +		     SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> +		     SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
>
>  	/* Set dithering if needed */
>  	sun4i_tcon0_mode_set_dithering(tcon, connector);


--
--
Frank Oltmanns

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  reply	other threads:[~2023-04-02 10:56 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-31 11:02 [PATCH 0/3] drm: sun4i: set proper TCON0 DCLK rate in DSI mode Roman Beranek
2023-03-31 11:02 ` [PATCH 1/3] drm: sun4i: rename sun4i_dotclock to sun4i_tcon_dclk Roman Beranek
2023-03-31 11:02 ` [PATCH 2/3] ARM: dts: sunxi: rename tcon's clock output Roman Beranek
2023-03-31 11:02 ` [PATCH 3/3] drm: sun4i: calculate proper DCLK rate for DSI Roman Beranek
2023-04-02 10:49   ` Frank Oltmanns [this message]
2023-04-03 13:52     ` Roman Beranek
2023-04-03 15:08       ` Frank Oltmanns
2023-04-03 17:22         ` Roman Beranek

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